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We are looking for an experienced Senior Missile Control Engineer to join our advanced defense-tech R&D team. The role involves leading the development, integration, and testing of missile control systems throughout the full system lifecycle, from algorithm design through simulation, hardware-in-the-loop testing, and flight trials.
Why Join us?
This is a unique opportunity to be at the heart of a defense-tech startup during its most exciting growth phase!
Responsibilities
Lead the design, development, and analysis of missile control algorithms.
Perform simulations, performance analysis, and robustness assessments.
Identify technical risks and propose practical engineering solutions.
Collaborate closely with systems engineering, software development, aerodynamics, mechanical design, and testing teams.
Participate in and analyse field experiments.
Ensure compliance with relevant engineering standards and safety requirements.

We're looking for a hardware architect for our NIC and DPU division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our next generation NIC and DPU products. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.

What you'll be doing:

Learn and understand the NIC u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.

Define the next generation of our systems. Work closely with GPU and CPU teams for building the cut-edge systems.

Define the implementation of the most sophisticated features of our next products, balancing architecture requirements with backend, execution, and design considerations.

Understand our system requirements and help define the POR of our NIC and DPU product line.

Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.

Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.

Thoroughly understand SoC flows, PCIe, Ethernet, InfiniBand and NvLink protocols.

We're looking for an AI Workflow Engineer to join our System Architecture group. This is a high-impact role where you'll design, build, and continuously improve AI-powered workflows, agents, and tools that help our architects do their best work - from system design and modeling through documentation, technical decision-making, and review.
Working from within the architecture team, you'll turn the group's real, day-to-day pain points into practical AI-assisted solutions. Your primary focus is system architecture within the software development lifecycle (SDLC), and because architecture touches everything, your work will naturally extend into adjacent stages wherever AI can add value.
Key Responsibilities:
Design and build AI-powered workflows, agents, and internal tools that support system architecture work - design, modeling, documentation, architecture decisions, and reviews.
Develop and iterate on agents within our internal framework, using agentic AI techniques to accelerate and augment architecture and engineering tasks.
Continuously improve existing workflows and tools as team needs evolve and AI capabilities advance.
Partner closely with the System Architecture team to understand real pain points and turn them into practical, AI-assisted solutions.
Measure and demonstrate the impact of the workflows you build - for example on design-cycle time, review turnaround, and the quality and completeness of architecture documentation and decision records.
Build proof-of-concept projects that show the practical value of AI in real architecture and engineering workflows.
Develop best practices, prompt engineering guidelines, and reusable patterns for AI-assisted architecture and development.
Stay current with the rapidly evolving AI tooling landscape and advise on strategic adoption.

We are seeking a highly driven, hands-on Operations Production Engineer to join our Operations & Manufacturing team. In this role, you will serve as the primary operational link to our Contract Manufacturers (CMs), drive the end-to-end NPI handoff process into steady-state production, manage legacy product lines, and streamline the production-side RMA pipeline.
If you thrive in a high-growth, fast-paced hardware environment, love diagnosing complex manufacturing challenges, and are passionate about continuous improvement, this is the role for you.
Key Responsibilities:
Contract Manufacturer (CM) Management & Line Ownership:
CM Operations & Execution: Drive day-to-day operational and technical alignment with external CMs to ensure high build execution, product yield, and strict adherence to quality and schedule targets.
Manufacturing Bottlenecks: Identify and resolve yield drops, component shortages/substitutions, or assembly issues directly with vendor engineering teams.
ECO/ECN Release: Oversee engineering change implementation across active production runs at the CM, maintaining clear configuration control.
NPI Composition Handoff & Legacy Product Support:
NPI to Production Handoff: Lead the operational composition and transfer of new product introductions (NPI) from R&D into scalable volume manufacturing at the CM level.
Legacy Product Management: Maintain operational health, sustaining engineering, and end-of-life (EOL) management for legacy product lines to ensure ongoing delivery stability.
Process Documentation: Define standard operating procedures (SOPs), assembly routing, build packages, and work instructions for incoming product variants.
Production RMA Process:
RMA Pipeline Management: Take ownership of the production side of the Return Merchandise Authorization (RMA) process, ensuring rapid triage, dispositioning, and turnaround times.
Feedback Loop: Feed critical quality, design, and manufacturing insights back to R&D and Quality teams to drive design-for-manufacturability (DFM) improvements.
Continuous Improvement:
Yield & Efficiency Optimization: Track key operational metrics (First Pass Yield, Scrap, Cycle Time) and implement engineering fixes to minimize waste and reduce lead times.
Tooling & Fixturing: Coordinate with suppliers to design, validate, or upgrade assembly fixtures, jigs, and test setups.

Required Micro-Architect
Description
A global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of the company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.

We are looking for an excellent design engineer to join our team and build our state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface.

We are seeking an experienced HW Team Leader to drive the engineering efforts behind our electronic systems. This role will focus on enhancing the testability, production efficiency, and quality of our products by defining Design for Testability (DFT) strategies, developing production test solutions, and leading failures investigation and correction.
What You'll Do:
Lead and mentor a team of highly skilled hardware engineers.
Drive execution in a fast-paced, multi-project environment.
Own and evolve our Design for Testability (DFT) strategy and guidelines.
Lead end-to-end development of production test solutions and test facilities.
Drive root-cause investigations, failure analysis, and product improvement initiatives.
Collaborate closely with R&D, manufacturing, and quality teams to ensure product reliability and production readiness.

We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the Platform team.
This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.
Responsibilities:
Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.

We are looking for a Qualification & Compliance Engineer to own the qualification and regulatory-certification path of our networking hardware platforms - from design-for-compliance through pre-compliance testing, accredited-lab campaigns, and global market certification. You will combine solid theory in EMC, product safety and environmental engineering with strong hands-on lab capability, partnering with electrical, SI/PI, thermal-mechanical, firmware and product teams to bring products to market on time, on-spec, and certified across all target regions.

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities:
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target impedance requirements and validate compliance across all power rails.
Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing.
Work closely with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces.
Develop power integrity design guidelines and best practices for next-generation networking products.
Support schematic reviews, layout reviews, and design sign-off activities.
Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment.
Investigate and resolve PI-related issues during board bring-up, validation, and production.
Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance.
Drive continuous improvement of PI methodologies, simulation flows, and validation processes.

We are looking for a senior Quality Engineer to serve as our main technical expert for hardware quality and environmental compliance from New Product Introduction (NPI) to mass production. In this high-level role, you will be responsible for building our very first quality plan, setting up our quality system from scratch, and writing all standard procedures.
You will lead the company through its initial certifications for both ISO 9001 and ISO 14001 and take full responsibility for keeping them updated. You will also look ahead to prepare our systems for ISO 45001 (Occupational Health and Safety) as we grow. someone with an open-minded and creative approach to finding ways to use AI tools to automate manual quality tasks. Working closely with both software and high density networking hardware teams, you will make sure our products, local and international factories, and global vendors meet top industry standards for reliability and sustainability. This role requires managing quality systems for production lines located both locally and abroad, with a willingness to travel and visit our global lines as needed.