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We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are looking for a Senior Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

We are seeking a highly motivated and experienced System Test Architect to define, develop, and drive comprehensive validation strategies for next-generation hardware platforms. As a key member of our hardware architecture and systems engineering team, you will be responsible for ensuring the robustness, performance, and scalability of our cutting-edge products across AI, graphics, data center, and automotive domains. You will collaborate with cross-functional teams-including silicon design, board design, firmware, and software engineering-to create innovative test methodologies that validate complex system-level interactions. Your insights and expertise will directly impact product quality, development efficiency, and time-to-market.

What you will be doing:

Architect end-to-end system validation strategies for new hardware platforms.

Define test coverage and validation methodologies.

Collaborate with hardware, software, Qual and QA teams to align on product requirements and test coverage plans.

Lead development of automation frameworks and diagnostics tools to enable scalable and repeatable testing.

Analyze test data to identify root causes, guide debug efforts, and improve validation coverage.

Provide technical leadership and mentorship across multidisciplinary teams and represent system test considerations in architecture and design reviews.

We are looking for a passionate, modern software engineer or junior architect early in their career. The role involves developing and prototyping new scalable training and inference advancements using our Spectrum-X AI fabric.

This role offers a rare opportunity to work on innovative AI and networking technologies, building prototypes that influence the development of large-scale AI systems. You will help improve AI application-network interaction by refining communication, crafting congestion control, contributing to NIC and switch capabilities, and enhancing AI factory performance at scale.


What youll be doing:

Prototype end-to-end solutions to improve distributed training and disaggregated inference performance.

Analyze and optimize communication flows across application, transport, and network layers.

Develop system software spanning communication libraries, drivers, and firmware integrations.

Collaborate with hardware, firmware, and SDK teams to co-design network features.

Validate and integrate prototypes into our AI infrastructure and products.

We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.

We are now looking for a Chip Design Verification Engineer. NVIDIA is seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.

What you'll be doing:

Develop shared verification code and solutions to be widely used by the chip design team.

Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.

Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.

Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.

Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.

Collaborate with designers, verification specialists to accomplish your tasks.

Develop training sessions.

We are hiring a senior, hands-on engineer to lead technical innovation in our Design Verification (DV) automation infrastructure. This role requires a strong design/verification background combined with a proactive approach - identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. You will directly influence how verification is performed across our next-generation Networking chips, enabling more scalable, efficient, and robust flows for complex ASICs powering the AI revolution.

What you'll be doing:

Lead the development of advanced verification automation tools, regression flows, and debug infrastructure.

Identify key challenges and inefficiencies in current DV methodologies and proactively propose and implement improvements.

Work closely with DV engineers, design teams, and tool developers to ensure solutions are practical and impactful.

Balance innovation with hands-on engagement in daily DV issues - keeping a strong connection to real-world challenges and support needs.

Act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for DV automation.

We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the tools that shape the future of Chip Design and Verification. This role is at the intersection of software engineering and hardware design. Youll work on the software that accelerates the development of NVIDIAs industry-leading networking chips - highway for the AI revolution.

We're looking for someone who combines strong coding skills with a solid understanding of chip design or verification. If youre excited about solving technical bottlenecks, building scalable tools, and collaborating with designers and verification experts, youll feel right at home here.

What youll be doing:

Develop software tools for our chip design and verification flows

Collaborate closely with designers and verification engineers to identify bottlenecks, propose improvements, and build software solutions that boost productivity and quality.

Own your solutions end-to-end - from idea to delivery to support.

We are seeking a dedicated NVLink Firmware Architect to join our esteemed engineering team in Israel. This is an outstanding opportunity to impact the future of data centers and networking technology. As a key member of our team, you will play a crucial role in developing and crafting our NVLink firmware stack and GPU scale-up networking. Our collaborative environment, combined with ambitious goals, will enable you to collaborate closely with ASIC and software architecture/design teams to pioneer innovative solutions.

What you'll be doing:

Collaborating with a team of innovative engineers to craft new networking applications that address sophisticated problems in groundbreaking ways.

Identifying and evaluating new technologies, innovations, and partner relationships to align with our strategic technology roadmap and enhance business value.

Defining the architecture of NVLink firmware running on GPUs and switches, ensuring flawless integration and performance.

Helping to determine and implement the strategic vision for NVIDIA networking alongside adjacent software and hardware architects.

We are now looking for a Chip Design Verification Engineer. We are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.

What you'll be doing:
Develop shared verification code and solutions to be widely used by the chip design team.
Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.
Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.
Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Collaborate with designers, verification specialists to accomplish your tasks.
Develop training sessions.

We are hiring a Principal Algorithms Solution Architect to lead innovation in algorithm design and system architecture, delivering transformative solutions in graphics, vision, and AI for our next-generation iTero scanners.
The role is located in Petah Tikva or Caesarea
Key Responsibilities:
Lead and execute cutting-edge algorithmic challenges, driving knowledge and breakthroughs across the company.
Play a pivotal role in shaping our algorithmic strategy and influencing performance outcomes.
Provide guidance, mentorship, and leadership to teams, ensuring successful delivery across multiple projects.
Apply advanced troubleshooting skills and collaborate with R&D and Product teams to resolve complex technical issues and ensure system reliability.
Partner with stakeholders to anticipate future challenges and design innovative solutions.
Participate in all phases of the algorithm development cycle, from concept through deployment.
Identify risks in algorithm and system design and propose effective solutions.
Evaluate existing solutions and recommend improvements to enhance efficiency, scalability, and robustness.
Consistently demonstrate innovative thinking, systemic understanding, and strong cross-team collaboration.
Maintain a strong leadership presence, fostering accountability, growth, and high performance across the organization.