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our company's EyeC VLSI team - a group designing the chips for RADAR systems for ADAS and autonomous cars. Our Physical Design group is working in a Startup like environment with respect to technical expertise, execution & responsibility . Each Physical Design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & RTL modifications to achieve converges Were looking for a Physical Design STA Technical Expert to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Leading FC timing activities & methodologies for brand New SoC, from definition to TO.
Writing design constraints (SDC) for FC/IP/Block levels for all modes.
Involved in chip architecture definition for functional & DFT domains.
Working in close collaboration with the front-end & architecture team.
Working with engineers to identify and overcome roadblocks and obstacles.
Defining AC timing from spec to implementation.
Supporting complex clock structures.

our company's EyeC VLSI team - a group designing the chips for RADAR systems from advanced ADAS to Full Autonomous Driving. Our Physical Design group is working in a Startup like environment with respect to technical expertise, execution & responsibility . Each Physical Design engineer has an E2E responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & RTL modifications to achieve converges Were looking for a Physical Design Expert to join the growing Technology Methodology & Execution team, that is responsible for developing both Technology Methodologies & Flows for all products and processes and the execution of complex Subsystems/IPs for our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Leading Subsystem/IP Layout activities for complex Sub Full Chip with several levels of hierarchies.
Floorplanning, top-down deliveries & bottom up rollup , Sub FC/ IP level integration & verification.
Signoff on all physical design domains PV, IR/EM, LEC, LP Verification.
Physical Verification expert, building, maintaining and enhancing the flow for new technologies, improving reliability & convergence ToT.
Servings as a technical expert while mentoring and guiding team members,
Hands-on physical design block owner from RTL to GDS , an option.

our company's EyeC VLSI team - a group designing the chips for RADAR systems from advanced ADAS to Full Autonomous Driving. Our Physical Design group is working in a Startup like environment with respect to technical expertise, execution & responsibility . Each Physical Design engineer has an E2E responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & RTL modifications to achieve converges Were looking for a Physical Design Timing Expert to join the growing Technology Methodology & Execution team, that is responsible for developing both Technology Methodologies & Flows for all products and processes and the execution of complex Subsystems/IPs for our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Leading Subsystem/IP Timing activities for complex Sub FullChip with several levels of hierarchies.
Timing rollup , analysis & of blocks & sub system levels & timing signoff on Function & Scan models on Sub FC /IP level.
Define timing signoff methodologies, corners, derates margins and improve QoR & convergence.
Involved in the chip design & architecture definition for both functional & DFT domain.
Serve as the technical STA lead while mentoring and guiding team members.

You will join a team of talented and experienced Signal/Power Integrity (SI/PI) & Electrical Validation engineers with wide scope of responsibility, from Pre-Silicon SI/PI simulations to Post-Silicon Electrical validation and debugging, covering all High-Speed interfaces and Power Delivery of our company EyeQ ASIC products.
What will your job look like:
You will deal with design, simulations, optimization and debugging of high-speed interfaces - like LPDDR4/5, PCIe Gen4/5, C/DPHY, Multi Giga-Bit Ethernet, High-Speed interfaces over Power Cables, Power Delivery Networks.
You will develop Layout guidelines, review the physical design process and check its quality.
You will deal with state-of-the-art signal & power integrity simulation tools and methodologies, advanced results analysis, optimization/verification of our company and customers' PCB designs, etc.
This is a dynamic work environment that requires interfacing with Silicon & Hardware design engineers, IP providers, Electrical and System Validation teams, Customer Application Engineers, EDA tools vendors, and product managers.
The proximity to Electrical Validation activities - we are a single SI/EV team - is another strong advantage, enabling joint simulation-measurements efforts.

we are responsible to foster quality and excellence in our company's products and processes across the entire company. our company focuses on ensuring high customers' satisfaction through continuous improvement and implementation of automotive standards and best-practices such as ASPICE, IATF16949, ISO 9001, VDA/AIAG Core Tools and ISO26262, both internal and across the entire supply chain, In order to support our company's objectives, The QMS & Production Quality team is looking for a Production Quality & Reliability Engineer
What will your job look like:
Define and implement Quality & Reliability (QnR) framework and workplan for our company's components from first Silicon and onwards (from scratch)
Define and lead/participate in: QnR validation activities, Fault Isolation, Failure analysis according to 8D method, Yield enhancement, SORT kill criteria definition based on reliability risks, Statistical bin limits.
Work closely with colleagues from other departments (PMs, development engineers, production engineers, management) and other organizations (suppliers and customers).
Work with contract manufacturers to analyze the production process, process capability and capacity and measurement systems capability.
Assess and control the activities through performing VDA6.3 audits.
Create, manage and update PPAP folders for components.
Identify opportunities for improvement and execute them.
Create relevant work items templates and coach the teams how to use them.
Assess KPIs of processes and activities and suggest corrective actions and improvement.
Represent components QnR related issues with customers, suppliers and 3rd party organizations.

We are seeking an experienced and driven Quality and Reliability (Q&R) Engineer to own and manage the qualification and long-term reliability of advanced automotive semiconductor products. In this role, you will be responsible for defining, executing, and ensuring product compliance with industry standards (e.g., AEC-Q100, JEDEC, ISO26262), collaborating cross-functionally with design, test, packaging, and manufacturing teams to ensure robust quality performance throughout the product lifecycle.
What your job will look like:
Lead end-to-end quality and reliability activities for new automotive product introductions (NPI), including definition of Q&R plans, stress test strategy, and execution of qualification.
Define and align qualification strategy with AEC-Q100, JEDEC (JESD22), and customer-specific requirements.
Drive reliability risk assessments (FMEA, FMEDA, fault tree analysis) in collaboration with functional safety and design teams.
Manage product qualification timelines, budgets, and documentation, including reliability test reports, risk mitigation plans, and deviation justifications.
Interface with OSATs and test/assembly partners to ensure reliability test execution, including HTOL, ELFR, HAST, PTC, HTSL, and solder joint reliability.
Lead root cause analysis and corrective actions for product or qualification-related failures (FA/8D process).
Act as the Q&R voice in cross-functional reviews (DFX, tape-out, production ramp, and PCN).
Track field returns, drive reliability monitoring, and contribute to continuous improvement activities.
Support audits, customer quality inquiries, and product certifications as needed.

our companys Autonomous Driving group in Haifa is looking for an Electrical Validation & Embedded SW Engineer. This is an exciting opportunity to join a growing team of highly talented engineers, working on the worlds most advanced SoCs for ADAS and self-driving vehicles. In our company, Electrical Validation engineers enable, debug, and validate high-speed interfaces - like LPDDR4/5, PCIe Gen4/5, and CDPHY - using high-end Lab measurement equipment and advanced SW tools. This dynamic work environment requires interfacing with Silicon and hardware design engineers, Software developers, Signal Integrity, and System Validation teams. The proximity to Signal/Power integrity simulation activities - we are a single SI/EV team - is another powerful advantage, enabling joint simulation-measurement effort.
What will your job look like:
You will join a relatively small team of talented and experienced EV/SI/PI engineers with wide scope of responsibility, from Pre-Si SI/PI simulations to Post-Si Electrical validation and debug, covering all the high-speed analog interfaces of our companys EyeQ products.
Responsibilities include performing electrical spec compliance and system margin validation, interface optimization, statistical results analysis, validation flow definitions, and automation, etc.
You will also deal with FW development, automation enabling, data post-processing and debug of high-speed interfaces, like LPDDR4/5, PCIe Gen4/5, and D/C/MPHY.

The company's Software group is looking for an excellent experienced DevOps engineer to join the Software infrastructure team. our company's software infrastructure CI Team is responsible for maintaining various CI flows and maintaining the high quality of the software and system products. Your expertise will contribute to our ongoing intensive development process while maintaining live production. Join us to make a difference in how the world drives!
What will your job look like?
Design, implement, and maintain CI infrastructure and automation tools to support scalable development.
Work hands-on with technologies such as Jenkins, GitLab, Kubernetes, Python, Groovy, and Bash.
Collaborate with multiple engineering teams to understand their CI/CD needs and provide high-quality solutions.
Lead technical improvements and proactively enhance system performance, scalability, and developer productivity.
Troubleshoot complex issues across infrastructure and code, and continuously drive innovation and process optimization.
Help shape a structured, collaborative, and improvement-driven engineering culture.

Which department will you join? The SOC verification group owns the important and challenging job of verifying our company's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

our company's Autonomous Driving Software Group in Haifa is looking for a Teach Lead to join our Team. Our group is responsible for writing new code to replace the existing code with a new design. We develop the software architecture system and tools to enable support for many new design wins and scale the company project to run efficiently in vehicles contributing to saving lives and enabling autonomous vehicles.
What will your job look like?
You will be part of the design of the car application that controls the main execution flow of various software components running on the company's chip. Additionally, it manages many sensors and their inputs, such as cameras, radar, and car signals.
The application integrates these inputs and feeds them into various algorithms to create a comprehensive worldview for the car.
The project is challenging both in its real-time complexity of a system with multiple sensors and being part of the overall automotive car system architecture.
Provide guidance and mentorship to software development teams.
Defining work process tools and technologies to enforce our customers' requirements.
Working in a large group of software developers with cross-team collaboration.

our company's Platform SW department is looking for a highly driven and dynamic Execution Project manager to join our team and help shape the future of Autonomous Driving systems. This is an exciting opportunity to work with highly talented teams, and take a significant role in the newest our company's systems development.
What will your Job look like?
Leading execution of project deliverables: requirements, planning, execution, and delivery
Participate in and lead technical discussions, remove blockers and be the glue holding the team together and the leader showing the way
Coordinating the execution of project deliverables within schedule and quality delivery
Working within a large cross functional organization, touching various aspects of the system: from algo acceleration to sensors BU, from OS development to the drivable path visualization for the passenger of the vehicle
Represent the group in project level status reports and report to upper management
Collaborate with various R&D groups and be part of technical discussions in a highly multidisciplinary environment.