לוח משרות דרושים עבודה היברידית

we are looking for a Senior Backend Engineer- Data Platform.
Be responsible to build and maintain state of the art Infrastructure to support Security vastly growing SaaS services. Build a resilient, scalable data-rich infrastructure that provides key functionality to tens of millions of users daily as well as our business stakeholders. As we see data to be core to our success, and inherent in every SaaS offering we provide, we are looking to reinforce our Infrastructure software engineering skills and grow our expertise in this field with emphasis on open-source tools and self development.
What youll do:
Building a state-of-the-art resilient infrastructure that comprises of micro-services as well as reusable frontend and backend components.
Provide architectural solutions for complex code issues.
Accommodate diverse and evolving requirements from internal teams as well as customers through designing future-friendly APIs and software components.

Were looking for a Senior Data & Analytics Architect to join our team and work directly with startup CTOs, engineering teams, and account teams. This is a hands-on, customer-facing architecture role where you will design and deliver production-grade data platforms on AWS.

The role is focused on turning real business problems into working systems, from early discovery and architecture design to supporting implementation. This is not a pure strategy or management role, its about making clear technical decisions and ensuring they hold up in production.

Work location: hybrid from Tel Aviv.

If you are interested in this opportunity, please submit your CV in English.

Key Responsibilities:
Design and deliver end-to-end data platforms on AWS, covering ingestion, storage, processing, and serving layers, including Well-Architected reviews and contribution to SOWs and HLDs.
Work directly with startup customers to understand requirements, challenge assumptions, and shape practical solutions.
Lead technical discussions, workshops, architecture reviews, and POCs.
Translate ideas and early concepts into clear architectures, including HLDs, SOWs, and implementation direction.
Make and explain trade-offs across cost, performance, scalability, and complexity.
Stay close to delivery, supporting teams to ensure solutions are implemented correctly.
Collaborate with Data Engineers, DevOps, Solution Architects and Account Managers to move projects from concept to production.
Contribute to internal standards, reusable patterns, and reference architectures.
Operate in a fast-paced, project-based environment with multiple customer engagements.
Stay up to date with modern Data Engineering and Analytics practices, and contribute to internal enablement, patterns, and knowledge sharing.
Work in a customer-facing environment that includes occasional travel, both locally for meetings and events, and internationally around once per quarter.

We are seeking a Business Development Team Lead to drive our Greenfield acquisition strategy within the startup cloud ecosystem. This role combines hands-on business development with team leadership, coaching, and strategic ownership.

You will lead a team of BDRs, define outbound strategy, and ensure consistent pipeline generation while acting as a key bridge between marketing, sales, and leadership.

Work location: hybrid from Tel Aviv.

If you are interested in this opportunity, please submit your CV in English.

Key Responsibilities:
Lead, mentor, and develop a team of Business Development Representatives to consistently achieve and exceed pipeline targets.
Monitor teams performance, and provide ongoing coaching, feedback, and career development.
Proactively identify, research, and qualify potential startup leads within the cloud ecosystem using tools such as LinkedIn, Salesforce, and industry-specific databases.
Attend local AWS and customer events to network, generate leads, and represent us within the cloud ecosystem.
Contact prospects via email, phone, and social media to generate interest in our solutions.
Maintain a robust and organized sales pipeline in Salesforce, tracking all interactions and ensuring follow-ups.
Own the initial stages of the sales cycle until handover to the Account Executive.
Work closely with the sales and marketing teams to align strategies and ensure seamless handoff of qualified leads.
Stay updated on cloud ecosystem trends, industry developments, and startup activity to refine outreach strategies.
Commit to regular business travel, locally and internationally.

We seek a dynamic Business Development Representative to join our team, focusing on identifying and generating Greenfield leads from startups in the cloud ecosystem.

Work location: hybrid from Tel-Aviv.

If you are interested in this opportunity, please submit your CV in English.

Key Responsibilities
Proactively identify, research, and qualify potential startup leads within the cloud ecosystem using tools such as LinkedIn, Salesforce, and industry-specific databases.
Attend local AWS and customer events to network, generate leads, and represent us within the cloud ecosystem.
Contact prospects via email, phone, and social media to generate interest in our solutions.
Maintain a robust and organized sales pipeline in Salesforce, tracking all interactions and ensuring follow-ups.
Own the initial stages of the sales cycle until handover to the Account Executive.
Work closely with the sales and marketing teams to align strategies and ensure seamless handoff of qualified leads.
Stay updated on cloud ecosystem trends, industry developments, and startup activity to refine outreach strategies.
Commit to regular business travel, locally and internationally.

We are seeking PHY Algorithm Technical Leader, Silicon One Israel
Meet the Team
You will join the SerDes System Algorithm team within Silicon One High Speed in Israel, part of our silicon development organization. The team works across modem technology, system modeling, and signal processing for high-speed SerDes devices.
Silicon One is at the center of our ASIC group, building next-generation network devices for AI networks, the 5G era, and the future of routing. Our design center brings silicon hardware and software disciplines together in one site, combining a small-team startup atmosphere with the scale and stability.
Your Impact
As a PHY Algorithm Technical Leader, you will provide technical leadership for the development, modeling, configuration, and optimization of algorithms for advanced SerDes modem systems. You will work with the latest silicon technologies and processes to help build large-scale, complex devices at the edge of feasibility.
Your work will contribute to Silicon One, a unified and programmable silicon architecture designed for service provider and web-scale markets. The role requires technical depth in digital signal processing, modem behavior, and using MATLAB for algorithm development, with the ability to guide algorithm work from initial concept through advanced SerDes system implementation.
Provide technical leadership for research, design, and development of PHY and modem algorithms for high-speed SerDes devices.
Define and use system models to analyze modem behavior, signal-processing performance, architecture constraints, and algorithm tradeoffs.
Guide modem configuration, tuning, and optimization to improve performance, robustness, and implementation feasibility.
Use MATLAB for algorithm development, simulation, testing, and data analysis.
Guide technical decisions, review algorithm tradeoffs, and mentor engineers on complex PHY and modem development tasks.
Lead cross-functional technical collaboration with system, silicon hardware, and software teams to move algorithms from modeling into practical implementation.
Support lab-based validation and debug activities when required.

Required IC Package Layout Designer
Job Description
Meet the Team
Join the Package Design Team at Silicon One in Israel, a group leading the way in developing our groundbreaking silicon solutions for next-generation networking. As a collaborative team at the center of our silicon development, we design and optimize advanced package solutions for some of the industrys most sophisticated ASICs. Youll work directly with experts in layout, signal integrity, and power distribution, shaping innovative methodologies and driving the evolution of high-performance networking technologies.
Your Impact
This role offers a unique opportunity to make a significant impact on the future of networking innovation within the Silicon One initiative. As a layout engineer, you will drive the entire package design layout process-from planning and optimization to execution-ensuring the delivery of high-speed, robust, and scalable solutions for global networks. You will work closely with engineers, define strategies, and collaborate across multi-functional teams to accelerate the creation of industry-leading packages. Youll join a passionate community dedicated to changing how the world connects, works, and learns, while building strong partnerships and fostering collective success.
Responsibilities:
Lead package layout design while planning and driving schedules from initial concept through full implementation.
Optimize package pinouts, stack-ups, power distribution, and high-speed routing, balancing performance and manufacturability
Collaborate with signal integrity (SI) and power integrity (PI) teams to ensure design quality and efficiency
Enhance design methodologies and partner with vendors to improve product quality and efficiency
Drive innovation in package solutions for our next-generation ASICs.

We are seeking a Physical Design Technical Leader.
Meet the Team
Physical Design team within Silicon One is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Required PHY Firmware Technical Leader
Meet the Team
Join the Silicon One PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.
We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.
Your Impact:
Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies
Who Youll Work With:
The Silicon One group, the center of our ASIC design efforts
Cross-functional teams including silicon design, firmware, and system
Global teams working together to deliver game-changing networking devices

Silicon One is seeking a Physical Design Group Leader.
Meet the Team
Physical Design team within Silicon One is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
As the Physical Design Group Leader, you will provide strategic and technical leadership to a team of engineers, guiding them through the entire chip design lifecycle. You will be responsible for the group's output, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Silicon One is seeking a CAD Engineer to join the Silicon One Physical Design team.
Meet the Team
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
As part of our team, youll contribute to the development of our next-generation network devices-Silicon One. Our team operates in a startup-like environment within a stable and leading corporation.
Our design center is uniquely equipped, hosting all silicon hardware and software development fields under one roof.
We are revolutionizing the industry by building a new internet for the 5G era, providing a unified, programmable silicon architecture that serves as the foundation for all of our future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, catering to both fixed and modular platforms. They deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility.
Silicon One is a ground-breaking, groundbreaking technology that will serve our customers and end users for decades to come. The Internet now has a new, faster, better, and safer engine!
Your Impact
You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.
You will be leveraging your backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.

Silicon One is seeking a CAD Engineer to join the Silicon One Physical Design team.
Meet the Team:
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
As part of our team, youll contribute to the development of our next-generation network devices-Silicon One. Our team operates in a startup-like environment within a stable and leading corporation.
Our design center is uniquely equipped, hosting all silicon hardware and software development fields under one roof.
We are revolutionizing the industry by building a new internet for the 5G era, providing a unified, programmable silicon architecture that serves as the foundation for all of our future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, catering to both fixed and modular platforms. They deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility.
Silicon One is a ground-breaking, groundbreaking technology that will serve our customers and end users for decades to come. The Internet now has a new, faster, better, and safer engine!
Your Impact:
You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.
You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

Required Leader, Software Engineering
Job Description
Meet the Team
The AI Software & Platform Group incubates and delivers Generative AI based solutions to reinvent our existing Products and how customers interact with them. Our Group is also introducing new offerings that help customers roll out Generative AI at scale while doing so responsibly. Ultimately we are doing so through internal platforms that unlock the benefits of this technology for our teams and partners across our Security, Enterprise Networking, Collaboration and Splunk portfolios.
Your Impact
As an Engineering Manager in Cloud Control, youll play a key role in
building the next-gen platform that brings together our product portfolio under one AI-native roof. Youll lead a growing engineering team in our TLV WeWork office (dedicated space with all the perks) while collaborating with global company groups on cross-product AI solutions. Own the design and implementation of functional and non-functional UI features.
Partner with your team to plan epics, deliverables, and sprints.
Work with org architects to drive functional and non-functional product enhancements.
Collaborate with other groups to deliver AI-native, cross-product integrations.
Actively contribute to the codebase, review PRs, and ensure engineering excellence.
Build and mentor a high-performing team while navigating the challenges of a large enterprise with a startup mindset.

We are seeking PHY Algorithm Engineer, Silicon One Israel
Meet the Team:
You will join the SerDes System Algorithm team within Silicon One in Israel, part of our silicon development organization. The team works across modem technology, system modeling, and signal processing for high-speed SerDes devices.
We are at the center of our ASIC group, building next-generation network devices for AI networks, the 5G era, and the future of routing. Our design center brings silicon hardware and software disciplines together in one site, combining a small-team startup atmosphere with the scale and stability.
Your Impact:
As a PHY Algorithm Engineer, you will develop, model, configure, and optimize algorithms for advanced SerDes modem systems. You will work with the latest silicon technologies and processes to help build large-scale, complex devices at the edge of feasibility.
Your work will contribute to Silicon One, a unified and programmable silicon architecture designed for service provider and web-scale markets. The role requires technical depth in digital signal processing, modem behavior, using MATLAB for algorithm development from the idea to advanced SerDes systems.
Research, design and develop PHY and modem algorithms for high-speed SerDes devices.
Build and use system models to analyze modem behavior, signal-processing performance, and algorithm tradeoffs.
Configure, tune, and optimize modem behavior to improve performance, robustness, and implementation feasibility.
Use MATLAB for algorithm development, simulation, testing, and data analysis.
Collaborate with silicon hardware and software teams to move algorithms from modeling into practical implementation.
Support lab-based validation and debug activities when required.

Required Logic Design Engineer
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.