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You will join an innovative, high-performance team and work with cutting-edge technologies in a dynamic and agile environment.

What you'll be doing:

You will take an active part in the challenge of managing a highly available and fault tolerant production environment.
You will assist in identifying and resolving performance concerns and operational bottlenecks, debug complex pitfalls and advise on system architecture solutions.
You will build, design and maintain self-serve devex tools to increase development velocity and satisfaction.
You will push and impact our systems to be more cost effective, performant and simple to use and extend.

We are seeking a skilled and experienced Senior Frontend Infrastructure Engineer to join our Core Team. As a member of this team, your main responsibility will be crafting and evolving the frontend infrastructure of our product. You will focus on building resilient, scalable frontend frameworks, tools, and libraries that empower and support our React-based application and the teams building on top of it.

Responsibilities
Design, develop, and maintain frontend infrastructure, including frameworks, tools, and libraries, to ensure high performance, scalability, and long-term maintainability.
Work closely with product and R&D teams to understand requirements, influence technical decisions, and ensure infrastructure solutions align with real product needs.
Serve as a senior technical authority in the frontend domain, leading by example through high-quality architecture, code, and best practices.
Identify and implement improvements to the frontend development experience, including automation, developer tooling, code reuse, and performance optimizations.
Take part in architectural discussions and help shape frontend standards and conventions across the organization.
Stay up-to-date with modern frontend technologies, trends, and best practices, and apply them pragmatically to improve development efficiency and product quality.
Conduct code reviews with a strong focus on maintainability, performance, and scalability.
Troubleshoot and resolve complex frontend infrastructure issues in collaboration with other engineers and infrastructure teams.

We are looking for a highly skilled and motivated Software Team Lead to drive the technical direction of our development team while maintaining a substantial hands-on contribution. This role involves leading the team, hiring top talent, and ensuring the successful delivery of high-quality software solutions.
Responsibilities:
Technical Leadership: Guide the team in designing, developing, and maintaining robust cybersecurity solutions using Golang, C#, and Python.
Hands-On Development: Write high-quality, scalable, and secure code (50% of the time).
Team Management & Growth: Hire, mentor, and grow a team of talented engineers to build innovative cybersecurity products.
Code Reviews & Best Practices: Ensure high code quality through reviews, technical mentorship, and the enforcement of best practices.
Collaboration: Work closely with product managers, security researchers, and other stakeholders to define and deliver features.
Technical Roadmap: Contribute to architectural decisions and shape the future of the company's technology stack.

we are looking for a Full-Stack Engineer- Credit Team
We'll get there by investing in things like:

- Automating underwriting decisions

- Turning manual operational work into tooling and automation

- Building configurable capabilities instead of customer-specific implementations

- Using data to improve underwriting, product decisions and customer experience

- Making our systems easier to evolve as both the product and the company grow

we are a fast-growing global body care brand, built on a proprietary e-commerce platform, deep consumer insights, and a relentless focus on performance. Millions of women worldwide use our products, and we are on a mission to become one of the most influential body care brands globally.
We operate at extreme velocity, with high standards and an obsession with results. We believe in challenging conventional thinking, making data -driven decisions, and moving quickly from idea to execution.
We are looking for a Forward Deployed Engineer (FDE) to build and lead our company's AI transformation journey, serving as a rare opportunity for a highly strategic and deeply hands-on builder who thrives at the intersection of business, technology, and execution. In this role, you will have the ultimate playground to shape how our entire company operates, influence every major function, and create a lasting competitive advantage for a leading body care brand. Initially operating as an individual contributor partnering closely with the CEO and the Management Team. Over time, you will transition to build and lead a small, high-performing team as AI becomes an increasingly critical capability across our global e-commerce and retail operations.
To thrive in our high-pace environment, you must think like an owner, not a consultant, and be equally comfortable discussing macro business strategy with executives as well as writing code to solve a messy problem yourself. You are someone who embraces ambiguity, enjoys building from scratch, and is completely obsessed with execution. You possess the high emotional intelligence and empathy required to collaborate with non-technical stakeholders and build trust, yet you maintain the thick skin, resilience, and great sense of humor needed to handle direct communication and rapid structural pivots. Most importantly, you maintain an uncompromising commitment to quality and process improvement, ensuring that every automation or workflow you deploy actively drives our core business metrics forward without requiring hand-holding or constant reminders.
Your life at our company will look like
* Define and lead the company's AI strategy and execution roadmap.
* Identify the highest-impact opportunities for AI across all business functions.
* Prioritize initiatives based on measurable business value, speed of implementation, and scalability.
* Design, build, deploy, and continuously improve AI-powered workflows, tools, automations, and agents.
* Translate business challenges into practical AI solutions that improve performance, efficiency, and decision-making.
* Develop production-ready applications and workflows using modern AI technologies, APIs, agents, and automation frameworks.
* Drive adoption and behavioral change across teams.
* Partner directly with business leaders to identify opportunities and implement solutions.
* Evaluate emerging technologies, models, vendors, and platforms.
* Establish governance, standards, architecture, and best practices for AI development.
* Define and track success metrics for every AI initiative, ensuring measurable impact on growth, productivity, speed, efficiency, or cost.
You will thrive in this role if you have
* Strong technical foundation in Computer Science, Software Engineering, data Science, or a related field.
* 5+ years of experience building technology, data, AI, automation, or software solutions in high-performance environments.
* Proven experience identifying business opportunities and translating them into deployed AI products, agents, automations, or workflows that drive measurable business impact.
* Hands-on experience working with modern generative AI technologies, LLMs, agent frameworks, APIs, embeddings, automation platforms, and production deployments.
* Strong proficiency in Python, SQL, APIs, and data -driven application development.

As a Product Manager at Balance, you will own and evolve core product experiences that power how businesses manage and optimize their financial workflows. You will lead cross-functional initiatives across engineering, design, sales, and customer teams to deliver scalable, reliable, and intuitive solutions. As part of our evolution, you will help shape AI- and agent-driven workflows that redefine how financial operations are built and experienced. You will drive product initiatives end-to-end, identify new opportunities for growth, and ensure alignment with business goals and regulatory requirements.

Responsibilities
Own a core product domain, driving strategy, execution, and outcomes.
Collaborate with cross-functional teams including engineering, design, sales, and marketing to define requirements and deliver high-impact solutions.
Work closely with internal stakeholders and external partners to understand APIs, integrations, and system constraints.
Engage directly with customers and prospects to understand their workflows, validate solutions, and support enterprise conversations.
Translate complex business processes into simple, scalable, and user-friendly product experiences.
Define and ship AI-powered and agent-based product capabilities, both in customer-facing workflows and internal tooling.
Continuously monitor and improve product performance across both technical reliability and key business metrics.
Stay informed about industry trends, regulatory changes, and emerging technologies to identify new opportunities.

As we expand our presence in Israel, we're seeking a highly skilled Static Timing Analysis (STA) Engineer to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the sign-off methodology for chips that power the world's most advanced AI clusters. As an STA Engineer, you will be deeply involved in the STA activities from chip partition and time budgeting through to final sign-off. You will bridge the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.


Key Responsibilities
Execute the STA flow and sign-off methodologies, ensuring our products meet rigorous timing criteria for the most demanding data center environments.
Collaborate closely with Architecture, Design, DFT, and Backend teams, participating in timing reviews and working with block owners to navigate the path to sign-off convergence.
Develop, optimize, and manage complex SDC constraints, ensuring they are accurate and robust across multi-scenario environments.
Analyze and resolve challenges related to cross-chip clock distribution networks and apply sophisticated margining techniques to ensure robust silicon across all process corners.
Participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and custom scripts to make our sign-off process faster and more efficient.

As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in SoC EMIR to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As an EMIR Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.

You will be responsible for SoC EMIR Analysis to ensure our products meet aggressive voltage drop and reliability targets in advanced FinFET process nodes, directly impacting the performance and yield of chips operating in the worlds most demanding AI and cloud environments.

Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) of very complex chip.
Collaborate closely with Physical Design team to insure a full power integrity
Be responsible on IR architecture for timing convergence.
Partner with Package Design engineers to perform Chip-Package co-analysis (CPM).
Understand root-cause analysis for voltage drop violations and EM risks.
Be responsible and go-to person for any IR related issues.

As we expand our presence in Israel, we're seeking a talented Staff/ Principal Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.

As a Staff/ Principal Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.

Key Responsibilities

Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks
Develop and maintain SystemVerilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified

Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process
Drive designs toward 100% verification closure through comprehensive test development
Contribute to verification methodology improvements and best practices

Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle
Apply analytical skills and debugging techniques to solve intricate verification challenges
Collaborate effectively in a fast-paced, team-oriented R&D environment

As we expand our presence in Israel, we're seeking a highly skilled Chip Top Physical Design Engineer focusing on implementation to join our local engineering powerhouse from the ground up.
If you thrive on solving complex, unnamed challenges in deep-submicron processes, your place is with us.

As a Physical Design Engineer, you will be a key hands-on member of our PD Team in the Israel R&D center. You will execute the physical design of the SoC Top level for chips that drive the worlds largest AI clusters. You will be deeply involved in all PD disciplines of the chip, driving the tape-out (T.O.) GDS to meet strict signoff criteria (Timing, LVS, EMIR, DRC, PV, etc.), ensuring our silicon meets the extreme performance, power, and area (PPA) targets required for AI scale.

Key Responsibilities
Execute SoC Top-level physical design and actively drive full-chip convergence.
Perform Top-Level physical implementation, including floor-planning, Place & Route (P&R), Clock Tree Synthesis (CTS), Power/Clock distribution, Power Integrity, and Timing/Physical signoff.
Work closely with the Architecture, Design, DFT, and Product teams to achieve optimal Power, Performance, and Area (PPA). This involves participating in feasibility studies for new architectures and optimizing runs to ensure the best Quality of Results (QoR).
Resolve complex signal integrity, thermal, and power challenges inherent in high-speed connectivity silicon.
Collaborate closely with the Package team on Bump-map-to-Ballout design, taking all signal integrity aspects into consideration.

As we expand our presence in Israel, we're seeking a talented Staff / Principal ASIC Design Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful product ownership in a new site, designing the digital blocks that sit at the heart of our most ambitious connectivity projects.

As a Staff / Principal ASIC Design Engineer, you won't just build chips-you will be part of a team defining the next generation of AI infrastructure main components. The complex digital blocks under your micro-architecture and implementation responsibilities will power the world's largest AI clusters. You will own the journey from high-level definition through RTL implementation and backend support, transforming complex logic challenges into elegant, high-performance hardware. If you thrive on solving challenging problems in deep-submicron processes and want to contribute to the digital design foundation for AI infrastructure connectivity, this is your opportunity.

Key Responsibilities

Design Ownership & Implementation
Own the journey from high-level definition through micro-architecture, coding, and debug to backend implementation support.
Tackle complex logic challenges and transform them into elegant, high-performance hardware solutions.
Serve as the point of contact for your logic blocks, interacting with Architecture, Verification, and Backend teams.

Quality Assurance & Design Optimization
Utilize industry-leading EDA tools (Lint, CDC, Synthesis, Timing, Power) and in-house quality assurance tools to ensure designs are robust, scalable, and power-efficient.
Apply design techniques to meet PPA (Power, Performance, Area) targets.
Contribute to design quality through verification and validation activities.

Methodology Innovation & Collaboration
Participate in design methodology improvements and tool automation initiatives.
Leverage AI assistance tools and contribute to in-house automation development to make engineering workflows faster and smarter.
Collaborate effectively across teams to ensure seamless integration.

As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in SoC EMIR to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As an EMIR Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.

You will be responsible for SoC EMIR Analysis to ensure our products meet aggressive voltage drop and reliability targets in advanced FinFET process nodes, directly impacting the performance and yield of chips operating in the worlds most demanding AI and cloud environments.

Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) of very complex chip.
Collaborate closely with Physical Design team to insure a full power integrity.
Partner with Package Design engineers to perform Chip-Package co-analysis (CPM).
Understand root-cause analysis for voltage drop violations and EM risks.

As we expand our presence in Israel, we're seeking a visionary Staff DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.

As a Staff DFT Engineer, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.

Key Responsibilities

DFT Architecture & Strategy
Own the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support.
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards.
​DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG methodologies.

Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production.
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance.
Drive test coverage and quality metrics to meet stringent manufacturing requirements.

Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR.
Participate in developing and maintaining cutting-edge DFT implementation flows.
Automate and improve methodologies using advanced scripting and tools.

As we expand our presence in Israel, we're seeking a visionary Silicon Technical Program Manager to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, leading the physical implementation strategy for chips that power the world's largest AI clusters.

As an Technical Program Manager, you will be the key architect of our silicons operational reality. You wont just track timelines - you will help establish our local execution culture and technical standards, owning the cross-functional journey of transforming complex logic into high-performance silicon.

Key Responsibilities
Drive and manage ASIC development and subsystems from concept through to production in collaboration with internal teams and external vendors.
Provide hands-on program management throughout the full development cycle of silicon and firmware, including concept, design, development, fabrication, validation, and production release.
Work closely with the software, hardware, and architecture teams to align with product requirements and ensure all constraints are met.
Lead process improvements across multiple teams and functions to drive better collaboration and efficiency.
Independently manage complex projects with minimal supervision, ensuring timelines and milestones are met.
Deliver high-quality ASIC solutions products while collaborating with product management and architecture teams.