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We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing full-chip physical design methodologies, Physical Verification development and support through all the projects, Tapeout activities for implementation of networking chips and SOCs.

Work closely with Full Chip Layout owners and block owners, project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art FCL physical design problems that are needed for our chips.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

Participating and developing flow and tool methodologies for fullchip, physical design verification across multiple projects.

As an AI/ML Solution Engineer in the AI-Native Development team, you will design and build AI-powered development pipelines, evaluate ML approaches for code generation and review, and drive the adoption of AI-assisted software development across the organization. You will work at the intersection of machine learning and software engineering - selecting the right models, feedback strategies, and evaluation frameworks to make AI-generated code reliable, high-quality, and trustworthy.

What you'll be doing:

Drive architecture, applied research, and hands-on development by defining and building AI-native software engineering solutions.

Design and build AI-powered development pipelines - from code generation and automated review to feedback loops and evaluation systems.

Evaluate and select ML approaches for specific problems: when to use LLM prompting vs. fine-tuning (QLoRA), classical ML (random forest, linear regression) vs. reinforcement learning, RAG vs. structured extraction.

Architect feedback and evaluation systems that measure and improve AI output quality over time.

Review and refine AI solution architectures - evaluate design decisions, identify weaknesses, propose alternatives with reasoning.

Lead proof-of-concept development to validate new AI/ML approaches for development tooling.

Collaborate with the core team to define risk-based development levels and calibrate AI review depth per level.

We are looking for a Senior Software Engineer to join the AIOps platform team and help build the core distributed systems that ingest massive telemetry streams from GPU clusters and operationalize predictive AI models at scale. You will work at the intersection of high-performance data engineering and production ML, turning research algorithms into reliable, mission-critical software.

What you'll be doing:

Architect and build an agentic AIOps system that autonomously monitors GPU fleet health, aggregates and correlates massive telemetry streams, surfaces intelligent alerts, and orchestrates multi-step diagnostic workflows and corrective actions - powering real-time dashboards, automated root-cause analysis, and proactive incident response.

Research, evaluate, and prototype data storage strategies and data representations across diverse database technologies and modalities, ensuring AI models are trained on high-quality, well-structured data that improves predictive accuracy and generalization.

High-Scale Engineering: Design distributed systems to handle the extreme telemetry density of large-scale AI clusters, ensuring efficient data ingestion, processing, and real-time analysis.

Instrument services with deep observability (metrics, logs, traces) to support rapid debugging and continuous performance improvement.

Build and own the model-serving infrastructure that operationalizes predictive algorithms at scale - packaging, versioning, deploying, and monitoring AI models in both SaaS and on-premises environments.

Contribute to the platform's core libraries and abstractions that accelerate development across the broader AIOps engineering team.

We are looking for Senior Software Engineer to join the Cumulus Linux team! We present you with an opportunity to be part of the team that develops the Network Operating System that powers data centers that are accelerated, disaggregated and software-defined to meet the exploding growth in AI and high-performance computing. You'll be part of a software development team responsible for defining and implementing core platform services, as well as Reliability, Availability and Serviceability features for Cumulus Linux, the Debian-based operating system for NVIDIA's market-leading Ethernet switches.

What you'll be doing:

Design and develop software for Cumulus Linux operating system (OS) which runs on our portfolio of data center switches.

Work on bringing up Cumulus Linux on next generation Nvidia switches.

Develop and maintain software in Python, C and Shell for our OS.

Collaborate with product, architecture, and engineering teams to deliver features on Cumulus Linuxs roadmap.

Debug and resolve issues reported by test and customer-facing teams.

Work with open source software that is part of our OS and fix issues as and when they are raised.

We are looking for best-in-class Senior Chip Design Verification Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:
Take a crucial part in developing our next-generation chip controller and boot.
Design and verification with challenging multi-discipline context.
Take part in the development of all our networking and GPU networking chips and systems.

We are looking for an experienced Design Engineer to join the YU design team and develop the next generation technologies.

As a design engineer in the YU design team, you will participate in definition and implementation of our boot and chiplet control technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated boot components into various projects and using state-of-the-art technologies.
As a member of our YU design team, you will participate in defining various boot and chip controller features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

We are looking for an excellent Senior Firmware Engineer to join the Firmware team. The Firmware team develops groundbreaking networking features for AI, cloud, HPC and storage. We drive the data growth of the worlds biggest companies. With many hardworking engineers around the globe, the work environment is complex, results-oriented and fast paced. You will learn how a big software project is operated, maintained, qualified and released, and how Hardware and Firmware are developed

What you will be doing:

Work closely with the architecture and different software and hardware design teams.

Implement new features for our NIC and Switch firmware.

Develop verification tests for advanced features in a highly complex and sophisticated Firmware testing environment.

Collaborate with multi-functional teams including chip design, board designers, Silicon, SW and program managers to debug any FW/validation issues.

Heavily involved with the early modeling and simulation required to produce our outstanding products including schematic and layout reviews on next generation board designs.

As we enter the exciting new era of AI, we seek a dedicated PLM Business Solution Architect to join our dynamic team in Tel Aviv. This role offers an outstanding opportunity to lead efforts in harmonizing and optimizing Product Lifecycle Management (PLM) processes and systems. You will collaborate with skilled professionals in the industry.

What you will be doing:
Partnering with business collaborators to analyze requirements and translate them into functional PLM processes and solutions.
Architecting and crafting PLM system capabilities such as BOM management, change management, compliance, and data migration.
Leading and supporting PLM harmonization projects, integrating processes across different organizations and legacy systems.
Collaborating with IT and business groups to ensure detailed integration of systems alongside enterprise applications such as ERP, CAD, and SAP.
Developing documentation, guidelines, and training programs to support adoption and user readiness.
Providing expert mentorship on PLM methodologies, ensuring solutions are scalable and aligned with business goals.
Identifying risks, dependencies, and opportunities for process improvements.

Join our elite team, where we transform modern technology and bring groundbreaking innovations to life. As a Senior Hardware Engineer, you'll be part of a visionary group driving the future of AI, robotics, and autonomous driving. Our Israel-based team thrives on solving complex challenges while promoting a collaborative and inclusive environment where bold ideas flourish. This is your chance to contribute to a legacy of excellence and make an indelible impact on the world!

What you'll be doing:

Crafting, developing, and implementing advanced hardware solutions that power next-generation AI and computing platforms.

Collaborating with cross-functional teams to ensure seamless integration of hardware components.

Conducting rigorous testing and validation to deliver flawless performance in our products.

Analyzing and optimizing system performance to meet strict quality standards.

Partnering with software engineers to determine hardware requirements and ensure successful implementation.

Leading and mentoring junior engineers, encouraging a culture of innovation and collaboration.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Perform advanced Static Timing Analysis (STA) for HSIO at chiplet and FC level.

Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.

Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.

Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.

AI use for timing optimization and data analysis.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

You will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.

We are looking for an experienced DFT Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

We are looking for a highly motivated backend software engineer specializing in creating high-scale, distributed backend systems.
You must demonstrate strong software engineering skills, excellent interpersonal communication, extreme ownership, and the ability to accept and give meaningful technical feedback.
You will be responsible for designing architecture, writing correct, robust code, maintaining and improving existing functionality, and shipping new features.
You will work as part of a Scrum-Agile cross-functional team and collaborate with front-end engineers, quality engineers, product managers, and more.
The platform you help us build will scale novel functionality to millions of Plus users worldwide.
Our team strives to set the bar for real-time, high-scale, mission-critical trading systems. We want to work with people who are excited by this goal and have the talent to deliver on it.
What Youll Do - Responsibilities:
Design and build scalable, high-availability mission-critical systems and APIs
Drive the migration of large-scale, distributed trading services towards cloud-native microservices
Solve problems using distributed, asynchronous messaging
Tackle technical challenges - performance, fault-tolerance, security, and live production issues
Work closely with product, DevOps\SRE, and infrastructure teams - we practice full-cycle development where developers own and operate what they build.
Mentor Jr engineers as a Senior member of the team

we are looking to hire a QA Engineer.
The QA team is responsible for testing all aspects of the R&D departments work and ensuring that all products meet the highest quality standards.
Responsibilities:
Test all aspects of the R&D artifacts.
Plan and execute manual testing (functionality, regression, GUI, etc).
Analyze logs and reproduce bugs.
Client-server testing on Web, iOS, and Android.
Write test cases for automated tests, execute them, and analyze them.