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we are now looking for a senior chip design rtl design engineer for the switch silicon group.
as a chip design engineer networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a combined design and verification team which develops some of the switch silicon core units.
plan and design rtl units / blocks according to arch & micro arch specifications under challenging constraints with high orientation to power, area, and performance.
build reference models, verify and simulate chip blocks/entities according to specifications.
work closely with multiple teams within organizations such as architecture, micro- architecture, and fw.

looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part inflows development.

we are currently seeking a power integrity engineer. you will collaborate closely with our teams in the usa and india, drawing on extensive knowledge, technologies, and tools. as part of our team, you will contribute to the development of our ethernet switch system product line, supporting the process from concept through design, implementation, verification, and release to customers. if you enjoy working with talented individuals to achieve ambitious goals, nvidia could be the ideal place for you. our team is dynamic, working with cutting-edge and unique technology. if youre someone who thrives on challenges, we invite you to join this diverse team and make a significant impact!
what you'll be doing:
ensuring robust power integrity in physical design to optimize power delivery
design and optimize physical design solutions for power integrity. 
perform power integrity analysis and mitigation. 
focal point for pi for partitions owners.
collaborate with hardware and design teams on power delivery strategies.
utilize tools and flow in advance technology to meet project development

we are now looking for a senior chip design engineer to join our switch silicon team. as a chip design engineer at our networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a design/verification team which develops core units within the switch silicon.
micro-architecture of rtl verification environments planning for units and modules.
design rtl of units/blocks according to arch. specifications under challenging constraints with high orientation to power, area, and performance.
rtl synthesis, timing, supporting verification, and silicon post to activities.
work closely with multiple teams within organizations such as architecture, u-arch, full chip micro-architecture, be, and fw.

we are now looking for a senior verification technical lead for our fc switch silicon team. as a fullchip verification technical lead engineer  networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a fc verification team within the switch silicon.
dynamic verification environments planning for units infrastructures and system level
work closely with multiple teams within organizations such as architecture, u-arch, full chip micro-architecture, be, and fw
responsible to drive the fullchip verification execution, including staging plan of the projects and deliveries

we are now looking for a chip design Verification engineer to join the chip design methodologies team. the team is in charge of the verification methodologies, shared code, training, and embracing new technologies. one of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. this position offers the opportunity to have real impact in a dynamic, technology-focused company.
what you'll be doing:
develop shared verification code and solutions to be widely used by the chip design team.
develop groundbreaking methodologies to create a flawless experience for Verification engineers to keep the focus on new problems.
collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
get in touch with eda vendors to learn about cutting-edge tools/technology and apply them into our verification process.
understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
collaborate with designers, verification specialists to accomplish your tasks.
develop training sessions.

we are now looking for a chip design engineer to join our switch silicon team for verification / design roles. as a chip design engineer at our networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a combined design and verification team which develops some of the switch silicon core units.
micro-architecture for rtl and simulation environment planning for units and modules.
design/verify rtl units/blocks according to arch. specifications under challenging constraints with high orientation to power, area, and performance.
build reference models, verify, and simulate chip blocks/entities according to specifications.
rtl synthesis, timing, supporting verification, and silicon post to activities.
work closely with multiple teams within organizations such as architecture, full chip micro-architecture, be, and fw.

we are now looking for a senior chip design rtl design engineer for the switch silicon group.
as a chip design engineer at nvidia's networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a combined design and verification team which develops some of the switch silicon core units.
plan and design rtl units / blocks according to arch & micro arch specifications under challenging constraints with high orientation to power, area, and performance.
build reference models, verify and simulate chip blocks/entities according to specifications.
work closely with multiple teams within organizations such as architecture, micro- architecture, and fw.

our company is searching for a strong technical leader to own the backbone of our networking research capabilities. we are looking for an engineering manager to lead the development of our high-fidelity network simulation platform and the extensive on-premise infrastructure that powers it.
in this role, you will lead a team of performance simulation software engineers and DevOps /infrastructure specialists. you will own the "simulation-as-a-service" product-a critical platform used by internal researchers to model next-generation data center architectures. your mission is to ensure our simulations are accurate, performant, and accessible, while managing the large-scale compute clusters required to run them.
what you'll be doing:
team leadership: manage and mentor a team of C ++ software engineers and DevOps infrastructure engineers, fostering a culture of performance, reliability, and code quality.
product ownership (sim-as-a-service): treat the internal simulation platform as a product. work with research partners to define the roadmap, prioritize features, and ensure high availability for users.
high-performance simulation: be responsible for the architecture and optimization of complex network simulation engines ( C ++ based), ensuring they can scale to model extensive data center topologies with high fidelity.
infrastructure management: own the lifecycle of our on-premise compute clusters and servers. drive decisions on hardware upgrades, prioritisation, and managing system resources.
DevOps & automation: lead the strategy for ci/cd pipelines, automated testing, and containerized deployments to ensure rapid iteration and stability of the simulation platform.
multi-functional collaboration: partner with the ai agents team to expose simulation apis, enabling agents to run experiments and gather data autonomously.

looking for outstanding chip design Verification engineers to join our networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
come and take a significant part in designing and verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
what you will be doing:
work in a combined design and verification team which develops core units within the networking silicon.
build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
work closely with multiple teams within organizations such as architecture, micro- architecture, full-chip, fw and post-silicon validation.
your daily work will involve all aspects of design verification: planning, coding, coverage and integration

we are now looking for an arch simulation manager to join our nvidia networking team! as a switch-arch simulation manager in nvidias networking business unit, you will lead a team of highly skilled hardware engineers responsible for verifying the next generation of nvidias cutting-edge switch products. this is a unique opportunity to make a real impact at the heart of nvidias ai and hpc revolution, while working in a fast-paced, innovative environment. you will be part of a passionate and experienced team using modern approaches to validate the performance requirements for the next generation of nvidia networking products. your work will influence key architectural decisions and help deliver world-class silicon solutions for data centers, high-performance computing, networking, and Storage applications.
what youll be doing:
lead and grow a team of hardware Verification engineers focused on arch performance validation of complex digital designs.
collaborate closely with architecture, design, dv teams to identify verification needs and drive closure.
provide technical guidance, mentoring, and support to engineers in the team.
own the planning and execution of simulation deliverables to ensure high quality and timely tapeouts.

we are now looking for a senior verification manager for our fc switch silicon team. as a fullchip verification manager in networking business unit, you'll lead a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a fc team, responsible to integrate and verify the switch at system level
lead and grow a team of fullchip Verification engineers
responsible to drive the fullchip verification execution, including staging plan of the projects and deliveries
provide technical guidance, mentoring, and support to engineers in the team.
work closely with multiple teams within organizations such as architecture, u-arch, full chip micro-architecture, be, and fw
dynamic verification environments planning for units infrastructures and system level
work with design/verification team which develops core units within the switch silicon.

our company has been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. today, were tapping into the unlimited potential of ai to define the next era of computing. an era in which our gpu acts as the brains of computers, robots, and self-driving cars that can understand the world. doing whats never been done before takes vision, innovation, and the worlds best talent. as an employee, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. come join the team and see how you can make a lasting impact on the world.
join our company, a world leader in computing technology and ai, where we are exploring new possibilities! our advanced development Network Engineer role in israel offers a special chance to contribute to large-scale network simulations for innovative ai datacenter research and development. you will be part of a dynamic team that values creativity and collaboration. if you are enthusiastic about technology and eager to build a significant difference, this is the place for you!
what you'll be doing:
developing a brand new digital twin powered by cuda technology for advanced research on data centers.
collaborating with a team of extraordinary engineers and researchers to develop and implement innovative solutions.
partnering with diverse teams to ensure smooth integration and deployment of network solutions.
continuously exploring new technologies and methodologies to improve our network capabilities.

we are looking for a senior firmware Verification engineer to define, develop and maintain verification for our ethernet switches. this role offers you an excellent opportunity to participate in the development process of switches and gain a deep understanding in hardware, firmware and software systems in a rapidly growing field.
what youll be doing:
closely work with sdk/fw r&d architecture and QA to define, write and implement TEST plan for out product existing new features.
be responsible for verification and delivering different networking features.
define, develop and maintain verification procedure and reference model infrastructure - make TEST suites robust.
work with continuous integration system, regression tools, automate builds, run TEST suites and analyzing results
we are an equal opportunity employer and value diversity at our company. we do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as a SOC physical design engineer, you will collaborate with functional design, design for testing (dft), architecture, and packaging engineers. additionally, you will solve technical problems with micro-architecture and logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.the ai and infrastructure team is redefining whats possible. we empower customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include , cloud customers, and billions of our  users worldwide. we're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for cloud, global networking, data center operations, systems research, and much more.
responsibilities
define and drive the implementation of physical design methodologies.
take ownership of one or more physical design partitions or top level.
drive to the closure of timing and power consumption of the design.
contribute to design methodology, libraries, and code review.
define the physical design related rule sets for the functional design engineers.