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25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Team lead to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
Leading and mentoring Physical Design-Backend team.
Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Take part in project definition towards POR, close interaction with other domains such as FE, ARCH.
Requirements:
B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering.
2+ years of managerial experience.
6+ overall years of experience in physical design.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317777
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25/08/2025
Job Type: Full Time
we are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What you will be doing:
Join Beer-Sheva/Tel-Aviv group, working on verification/design in the field of encryption accelerators.
Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.
Daily work will involve verification and might involve any or all aspects of chip development including design and micro-architecture.
Work closely with firmware and other groups around the globe.
Work mode: Hybrid home-office.
Requirements:
B.SC./M.SC. or equivalent experience in Electrical Engineering/Communication Engineering/Computer Engineering
5+ years of validated experience in RTL Frontend ASIC Verification (Chip Design)
High Level of English
Ways to stand out from the crowd:
Experience in RTL Frontend ASIC Verification
Knowledge in Specman
Knowledge in Verilog.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317773
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team.As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What You'll Be Doing:
Work in a design/verification team which develops core units within the Switch silicon.
Micro-architecture of dynamic verification environments planning for units and modules.
Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
5+ years of experience in RTL design/dynamic verification.
Knowledge in network protocols and/or HPC and distributed calculations - advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317762
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are now looking for a best-in-class Senior Chip Design Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer at our company's GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry our companys GPU Super-Chip.
What youll be doing:
Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU
Integrations and Full-Chip models
Verification of chip blocks/entities according to specifications under challenging constraints
Your daily work will involve all aspects of Design Verification : Planning, Coding, Coverage and Integration.
Requirements:
5+ years of experience in RTL design verification.
B.Sc. in Electrical Engineering or Computer Engineering.
A team player with good communication and interpersonal skills.
Ways to stand out from the crowd:
Knowledge in Specman and System-Verilog UVM
Knowledge in Networking.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317758
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דיווח על תוכן לא הולם או מפלה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group.
As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
Requirements:
B.Sc. in Electrical Engineering or Computer Engineering.
4+ years of experience in RTL design or RTL verification.
Previous experience in networking - an advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317746
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Perform advanced Static Timing Analysis (STA) for NiC and SoC projects.
Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.
Requirements:
B.SC./ M.SC. in Electrical Engineering.
At least 6+ years of hands-on STA experience.
Experience in Prime Time and signoff methodologies.
Excellent leadership capabilities.
Ways to stand out from the crowd:
Knowledge in physical design flows and methodologies (Synthesis, PNR, DFT designs).
Trong background of Prime time tool.
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317740
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
At our company, you will be joining a team of dedicated Physical Design Engineers who excel in developing high-speed communication devices. Our team is recognized for delivering highly efficient and low-latency products. Join us to contribute to groundbreaking chips in a professional environment. This is an ambitious role where you will compete and excel in a collaborative environment.
You will be empowered to determine and successfully implement world-class solutions. Join us to be part of a team where your work will be flawless, and your career will thrive in our encouraging and inclusive culture. our company has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!
What you'll be doing:
Learn and implement the complete place & route flow, using sophisticated software tools.
Be responsible for the physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed to and work on a variety of exciting designs, including high cell count and high frequency blocks, resolving timing and congestion problems.
Engage in the complete design chip development flow (RTL2GDS) including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering.
Knowledge in physical design flows and methodologies (PNR, STA, DRC, IR) - Advantage.
Deep understanding of all aspects of physical construction and integration.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
2-3 years of relevant experience.
Proven ability to work as a great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317729
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: More than one
Job Type: Full Time
we are looking for best-in-class STA Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part inflows development.
Requirements:
B.SC. in Electrical Engineering/Computer Engineering.
2-3 years of experience as STA engineer.
Ability to quickly adapt to new technology and go deep into new areas
Strong communication skills
Great teammate.
Drive new solutions based on any issues that arise
Ways to Stand Out From the Crowd:
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317724
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.
As a Senior Chip Design Verification Engineer in the DFT team at our company, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
BSc. in Electrical Engineering or Computer engineering, or equivalent experience.
5+ years of practical verification experience.
Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).
Experience with Specman is a plus.
Good understanding of RTL design (Verilog).
Strong debugging, problem solving and analytical skills.
Excellent communication and social skills.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317717
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Responsible for chip floorplan and pins placement
Running, debugging and approve Physical verification flows across multiple projects
Perform physical layout planning and optimization.
Requirements:
B.SC./ M.SC. in Electrical Engineering
At least 5+ years of hands-on layout design experience
Strong background of Physical Design Verification methodology LVS/DRC
Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc..)
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317712
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Job Type: Full Time
our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's an outstanding legacy of innovation that's fueled by great technologyand outstanding people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an worker , youll be immersed in a diverse, encouraging environment where everyone is motivated to do their best work. Come join the team and see how you can make a lasting impact on the world.
we are seeking a network security research architect who is interested in a chance to define, research, and implement next-generation security features for data centers networks. The position will take on a lead role, working with teams with varied strengths across our company and with external partners to research security requirements for networking products.
What you'll be doing:
Lead, research, design, develop, and implement solutions for securing networks and identifying threats and incidents in the network.
Apply innovative security primitives to enable secure platforms.
Collaborate across external and internal hardware and software research teams.
Architectural modeling, validation, microarchitectural definition, following standards bodies, and developing proof-of-concepts secure platforms.
Research network telemetry for supporting secure networking platforms confidentiality, integrity, and availability.
Requirements:
MSc or PhD in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience.
At least 5 years of experience.
Background in data center network protocols, threat modeling, and network security, as well as common mitigation techniques.
Programming and debugging fundamentals across languages such as Python, and C/C++.
Strong communication skills and a genuine passion for working together as a team are vital.
Ways to stand out from the crowd:
Proven security research experience and publications in top security conferences.
Experience with high-scale deployment challenges, RDMA networking, and machine learning.
Architectural background in hardware and software systems codesign.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317707
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Job Type: Full Time
our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's an outstanding legacy of innovation that's fueled by great technologyand outstanding people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an worker, youll be immersed in a diverse, encouraging environment where everyone is motivated to do their best work. Come join the team and see how you can make a lasting impact on the world.
We are seeking an experienced Malware Research Architect who can design and implement advanced malware detection systems using Virtual Machine Introspection (VMI) techniques. The ideal candidate should have deep expertise in developing out-of-VM security solutions that can detect and analyze sophisticated malware, rootkits, and other cyber threats by introspecting and reconstructing volatile memory states of guest operating systems and file system states. Strong knowledge of file systems, and hypervisor technologies is essential. The candidate will craft automated malware detection systems that use VMI and file system techniques to predict early signs of malware execution and accurately classify unknown threats.
What you'll be doing:
Lead, research, design, develop and implement solutions for next-generation secure networks.
Develop novel introspection, memory forensics, and file system methods to extract critical security events towards threat detection.
Collaborate with external and internal hardware and software research teams to apply extracted events for advanced malware detection.
Architectural modeling, validation, microarchitectural definition, and developing proof-of-concepts secure platforms.
Requirements:
MSc or PhD in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience.
5+ years of experience.
Background in memory forensics, introspection, operating systems, and file systems as well as common malware patterns and mitigation techniques.
Programming and debugging fundamentals across languages such as Python, and C/C++.
Strong communication skills and a genuine passion for working together as a team are vital.
Ways to stand out from the crowd:
Demonstrated security research experience and publications in top security conferences.
Experience with high-scale deployment challenges, networking, and machine learning.
Architectural background in hardware and software systems codesign.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317703
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25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for a best-in-class STA Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking large scale and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
Be in charge of full-chip/Chiplet level STA convergence from early stages to signoff.
Take part in floor plan design and Netlist creation with aim to optimize timing convergence and work efficiency.
Define and optimize, together with CAD, STA signoff flows and methodologies.
Digital Partitions' and analog IPs' timing integration, giving feedback and driving convergence.
Work closely with logic design and DFT engineers to define and implement constraints for the various work modes, including optimizing them for runtime and efficiency.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering.
2+ years of experience in physical design and STA
Proven experience in RTL2GDS and STA flows and methodologies.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.) and timing signoff (Primetime).
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317696
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שירות זה פתוח ללקוחות VIP בלבד
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Senior Chip Design Engineer, Formal Verification for our company's Networking team!
This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch and GPU technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies that are in the heart of the AI revolution. Our team delivers world class Chips solutions for HPC, AI infrastructures, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. our company has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tape-outs. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
What you'll be doing:
In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our company's core technology.
You will take part in the AI revolution led by our company, working on cutting edge architecture.
Requirements:
BSc in Electrical/Computer Engineering or MSc in Mathematics
5+ years of relevant experience in chip design field (design/verification/formal).
Excellent analytical, logical reasoning and problem-solving skills
Strong debugging and analytical skills.
Strong communication and interpersonal skills are required
Ways to stand out from the crowd:
Formal verification work experience
Team Player
Knowledge of digital logic.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317685
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שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
For over two decades, our company has consistently reinvented itself. Our creation of the GPU in 1999 not only fueled the rise of the PC gaming industry but also transformed modern computer graphics and revolutionized parallel computing. In recent years, our work in GPU deep learning has driven the advancement of modern AI, marking the beginning of a new era in computing. we are a "learning machine" that continually adapts to challenging new opportunitiesones that only we can solve and that have a global impact. This is our mission: to enhance human creativity and intelligence.
We are currently seeking a Power Integrity Engineer. You will collaborate closely with our teams in the USA and India, drawing on extensive knowledge, technologies, and tools. As part of our team, you will contribute to the development of our Ethernet switch physical design product line, supporting the process from concept through design, implementation, verification, and tapeout. If you enjoy working with talented individuals to achieve ambitious goals, our company could be the ideal place for you. Our team is dynamic, working with cutting-edge and unique technology. If youre someone who thrives on challenges, we invite you to join this diverse team and make a significant impact!
What you'll be doing:
Ensuring robust power integrity in physical design to optimize power delivery
Design and optimize physical design solutions for power integrity.
Perform power integrity analysis and mitigation.
Focal point for PI for partitions owners.
Collaborate with hardware and design teams on power delivery strategies.
Utilize tools and flow in advance technology to meet project development.
Requirements:
B.Sc. or higher in Electrical Engineering or related field: Solid educational foundation in electrical engineering principles, particularly in power integrity and physical design.
3+ years of experience in power integrity engineering: Proven experience in power integrity analysis, mitigation, and optimization, especially in the context of high-performance computing or networking hardware.
Proficiency with industry-standard PI tools: Hands-on experience with tools such as Cadence, Ansys, or other EM simulation tools, including power delivery network (PDN) analysis and design.
Ability to collaborate across teams: Strong communication and teamwork skills, with a track record of working closely with hardware and design teams to implement power delivery strategies.
Adaptability and problem-solving skills: Ability to thrive in a dynamic, fast-paced environment where quick thinking and creative solutions are often required.
Ways to stand out from the crowd:
Advanced degree (M.Sc./Ph.D.) in Electrical Engineering: Specialization in power integrity, signal integrity, or related fields, with a focus on cutting-edge research or projects.
Programming skills: Proficiency in Python, tcl, or other relevant programming languages for automating analysis or enhancing tool capabilities.
Innovative mindset: A demonstrated ability to push the boundaries of whats possible in power integrity design, contributing to our companys legacy of continuous innovation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317666
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