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We're looking for a strong engineer who is passionate about creating design flows and automation flows that enhance both the productivity and quality of our design team. The ideal candidate brings proven expertise in RTL design and front-end methodologies while having good software skills and a drive for improving and automating flows. In this role, you'll collaborate closely with architects, designers, verification engineers, and other cross-functional team members to refine existing design flows and introduce innovative automation solutions that streamline flows and elevate overall design quality.
Key job responsibilities

Core Responsibilities:
- Develop and implement new methodologies and infrastructure to empower design teams to operate efficiently while maintaining high-quality standards.
- Enhance and build design flows to boost the overall productivity of design teams.
- Collaborate with vendors to evaluate and qualify new design tools and updated tool versions.

As a Signal & Power Integrity Engineer on the Nitro team, you'll work on next-generation cloud infrastructure hardware while developing your skills in Signal Integrity and Power Integrity. This is an opportunity to learn SI/PI analysis and simulation while applying your hardware design knowledge to solve complex challenges in high-speed digital systems. You'll be mentored by experienced engineers and contribute to products that directly impact our customers.

Key job responsibilities
- Design and debug high-speed digital circuits for K2 cards and server platforms.
- Learn and apply SI/PI simulation methodologies for PCB and system-level designs.
- Collaborate with Package design, SerDes and DRAM IP provider, firmware, EC2, and manufacturing teams.
- Perform signal integrity analysis for high-speed interfaces and SerDes channels at the advanced of the technology.
- Analyze and optimize power delivery networks from card to system level.
- Support hardware bring-up, debug, and validation with hands-on lab work.
- Participate in design reviews and provide technical feedback with internal and external design teams.
- Work with cross-functional teams to resolve signal quality and power integrity issues.
- Contribute to design guidelines and best practices based on measurements and analysis.

As a Pre-Silicon Verification Engineer, you'll work at the heart of chip development, collaborating across teams to ensure our semiconductor platforms meet the highest standards before they reach production.
IO verification team will expose you to the most advanced technologies , as we lead the market with our leaving devices - youll soon have to expertise most advance protocols.

In this role, you'll engage in pre-silicon verification work that connects every phase of our product development journey- from initial product definition through firmware and software development.
You'll collaborate with hardware designers, software engineers, and cross-functional teams to validate complex semiconductor architectures and protocols.
Your days might include developing and executing verification test plans, analyzing simulation results, troubleshooting design issues, and participating in design reviews.
You'll work with advanced verification methodologies and tools, gaining exposure to cutting-edge technologies that define the next generation of cloud infrastructure.

Key job responsibilities
Develop and execute comprehensive verification plans and test cases using industry-standard methodologies and tools.
Design and implement verification environments and testbenches to validate hardware functionality and performance.
Collaborate with hardware design and software teams to identify, analyze, and resolve design issues and verification gaps.
Analyze simulation results and coverage metrics to ensure thorough validation of semiconductor designs.
Contribute to the continuous improvement of verification processes, tools, and methodologies.

Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world. Annapurna Labs, as part of Amazon Web Services (AWS), is looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.

Looking for exceptional engineers to join the top-tier team that is developing the next generation semiconductor platform, based on a revolutionary architecture. Engineers will participate in design activities, working on the next generation of our products.

You are invited to take part in developing, integrating and deploying cutting-edge technologies, starting with identification and definition of project requirements, architecture, feature development, and collaboration with the different groups.
Your design will be integrated into the nitro SoC, on millions of servers worldwide. This is an opportunity to have a large-scale impact.
As a VLSI engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities
* Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.

We are looking for talented people to join us, as leaders in our excellent Physical Design team, adopting super advanced process nodes, mentoring team members, and further developing our implementation methodologies.

Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macros and clusters level, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsis and Cadence.
* Engaged in defining implementation and signoff methodologies.

We are looking for talented engineers to help us develop a semiconductor platform based on revolutionary architecture.
Take part in the development of cutting-edge products within a disruptive system architecture. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. Our Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.
We are looking for talented physical design implementation engineers to join our excellent Physical Design team, which develops our next generation of products for the cloud market.

Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macros and clusters level, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsis and Cadence.
* Engaged in defining implementation and signoff methodologies.

We are seeking a highly experienced and passionate Senior Board Design Engineer to spearhead the development of next-generation hardware platforms built around Annapurna's state-of-the-art devices. The ideal candidate thrives on tackling complex technical challenges and brings extensive expertise in high-speed digital, power, and embedded system board design.

In this role, you will lead the design and development of complex electronic boards - from system architecture and component selection, through schematic capture, PCB layout oversight, board bring-up, validation, and debugging.
You will collaborate closely with cross-functional teams - including software, ASIC, mechanical, and system engineering - to ensure seamless integration and successful product delivery. As the technical focal point for your projects, you will provide technical leadership, make key design decisions, and drive engineering excellence.


Key job responsibilities
Lead the architecture, design, and development of complex high-speed and mixed-signal boards.
Define board-level architectures and select appropriate components based on system requirements.
Create detailed schematics and guide PCB layout activities, ensuring signal integrity, power integrity, manufacturability, and reliability requirements are met.
Perform board bring-up, debugging, validation, and root-cause analysis using advanced laboratory equipment.
Drive technical decision-making and act as the primary hardware design authority for assigned projects.
Review designs and provide technical mentorship to other engineers.
Ensure designs meet performance, quality, schedule, and cost objectives.

We are seeking for Platform Integration Engineer to own the development, testing, and monitoring of the manufacturing health of our Graviton products integrated into MLA Trainium product. You will be part of a team integrating new silicon, hardware, firmware, and software into a revolutionary system architecture.

Key job responsibilities
- Lead product integration from definition phase through mass production, including: Hardware-Firmware integration and validation, development and implementation of manufacturing test flows, system validation and qualification and production readiness verification.
- Define and implement screening test content for both production line and data-center environments.
- Drive continuous improvement of operational health monitoring and debugging capabilities.
- Collaborate with cross-functional teams to resolve integration and production issues.
- Implement test flows for improving product operational health at manufacturing sites.
- Integrate knowledge and data from customers and data sources for fast resolution of operational issues.
- Maintain quality documentation and collateral in order to improve manufacturing operations.
- Travel to manufacturing sites as needed (approximately 3-4 times per year, 1 week duration per trip) to support integration, validation, and operational improvements.

We're looking for a talented Chip Design Engineer to join our Nitro team in Tel Aviv and help shape what comes next.

What you'll do:
*Take an active, hands-on role in developing the next generation of the Nitro platform.
*Own critical IP blocks end-to-end - from architecture through tape-out.
*Collaborate with a world-class, fast-moving design team and see your work deployed at a scale no other platform can match, powering hundreds of thousands of businesses across 190 countries.

Key job responsibilities
As a Chip Design Engineer on the Nitro team, you will take full end-to-end ownership of one or more critical IP blocks within the product, guiding them from micro-architecture definition through RTL design, debug, synthesis, timing closure, and final sign-off before tape-out. Your work will ship in silicon that powers AWS at global scale.
You'll partner closely with the Verification and Emulation teams to shape test plans, review coverage, and close gaps early in the design cycle. Beyond your own IP, you'll collaborate across disciplines with Product Definition, Software, Physical Design, and Verification teams to deliver a fully integrated, production-ready chip.

We are looking for a Senior Network SW Engineer to join the SW group and take a major part in redefining the future of AWS cloud.
Were searching for engineers with a passion for networking to develop SRD (Scalable Reliable Datagram). SRD is a high-performance, low-latency transport protocol used within Amazon Web Services (AWS) infrastructure to optimize network performance. SRD powers several high-impact, cutting-edge products, including on-demand ML and HPC platforms leveraging EFA, next-generation storage services built on EBS, and the future of AWS network traffic.

Key job responsibilities
As a Senior Network Software Engineer on SRD team, your primary role will be to develop and optimize the implementation of SRD technology across AWS's network infrastructure. Your responsibilities will encompass designing, deploying, and maintaining SRD code-base, ensuring its reliability and scalability to accommodate the demands of various applications. An essential part of your role will involve conducting extensive network simulations to evaluate system performance under different conditions, enabling you to identify potential bottlenecks and inefficiencies. Using these simulations, you will troubleshoot network issues and implement robust solutions, leading to minimal data loss and latency. Leveraging your in-depth understanding of network protocols and AWS infrastructure, you'll refine and improve the SRD system's performance. Furthermore, you will be expected to mentor junior team members, leading projects to advance the SRD capabilities within the AWS environment. Staying updated with the latest industry trends and incorporating them into strategic network service planning.

We are looking for a junior Embedded Software Engineer, to join us in building the next generation of networking products. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, fast-paced environment. Working for Annapurna Labs is thrilling and a constant learning experience. As an embedded SW development engineer, you will be responsible for developing features for Annapurna Labs next-generation hardware, to enable high network bandwidth and packets-per-seconds (PPS) performance, with consistently low latency. You will work to bring up a broad selection of instance types, optimized for various use cases, to suit each of our customers needs, such as varying combinations of CPU, memory, storage, and networking capabilities. As a SW development engineer, you will play a key role in shaping architecture definitions and SW system designs, and help to resolve complex customer issues. You will continuously evolve technically, while working to monitor AWS cloud health, maintain high quality standards, develop highly-optimized code, and provide exceptional customer satisfaction.

Key job responsibilities
We will be conducting a unique onboarding training program, where you will be studying the following with our technical experts and team leaders:
* Embedded systems basics.
* Annapurna technologies in EC2.
* Cloud compute development.
* Networking 101.

Be part of a team responsible for designing the next generation of mobile devices. The position includes responsibility for system analysis and HW architecture design for high-speed and low-power interfaces, networking protocols, storage processing, including acceleration of protocols reducing overall power consumption. The job requires collaboration with multiple engineering functions and teams in various geographical locations. It includes identifying system use, requirements definitions, understanding of industry specification for interfaces, operating in industry Standards committees, SW and HW interaction, performance analysis, and more.

we are looking for a hands‑on Design Verification Lead to drive verification of next‑generation wired/wireless peripheral subsystems that power Snapdragon platforms.

As a DV Lead in the Peripheral group, you will own verification of complex IPs and subsystems, define and execute UVM‑based verification strategy, and lead a small team of talented engineers to first‑time‑right silicon.

This is a 5 days on site position in Haifa
What youll do

Define verification strategy, test plan, and coverage goals for complex peripheral IP and subsystem blocks

Architect, develop, and maintain UVM‑based constrained‑random verification environments

Lead day‑to‑day activities of a small DV team: task planning, code and testplan reviews, mentoring, and technical guidance

Drive debug of complex issues across RTL, testbench, and system level, working closely with design, emulation and validation teams

Analyze and close functional and code coverage, drive quality metrics to tape‑out criteria

Contribute to methodology and flow improvements across the Peripheral DV team

we are looking for skilled and motivated senior logic design engineers to join our next generation Snapdragon projects.

With this position you'll be joining the VLSI team of the Camera group working on cutting-edge image signal processor (ISP).

You will be working on innovative design implementing novel image processing and computer vision algorithms (traditional and ML based) that will further raise the bar of image capture for mobile, auto, connected smart camera application and much more.