דרושים » הנדסה » Senior Communication PHY Algorithms Engineer

we are looking for a Senior System Engineer.
Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication protocols.
Define requirements and guide multi-disciplinary teams (SW, Algorithms, DSP, and FPGA) through implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like MATLAB, Python, Excel, and other log analysis software.
Create and maintain comprehensive system-level documentation.
Gain a deep understanding of the full system to guide and support testing and validation teams, helping define methodologies, tools, and coverage strategies.

Were seeking passionate professionals who thrive in a fast-paced, creative, and collaborative environment - those who want to be part of the next generation of airspace security innovation.
Responsibilities:
Design and implement sophisticated digital signal processing algorithms for applications in areas such as signal processing and wireless communication physical layer.
Collaboration with a multi-disciplinary teams (algorithm engineers, systems engineers, SW engineers, etc.) to design and integrate challenging DSP algorithms for wireless systems.
Enforce high standards for software architecture, ensuring the DSP codebase is scalable, modular, testable, and maintainable.
Conduct thorough performance analysis and optimization of existing DSP systems, identifying opportunities for improvement.
Write clean, efficient, and maintainable code for production systems.
A proactive approach to innovation and a passion for developing high-quality products.

We are looking for a talented and experienced PHY system integration engineer with a can do attitude to join our growing, highly motivated and skilled PHY team. The system PHY integration engineer will work closely with the PHY algo group.
The members of this
group are highly skilled, experienced individuals who are keen to pass on their knowledge. The team is responsible for learning and understanding of PHY algorithms and defining PHY system tests for analyzing, tunning and verifying these algorithms and full system
behavior and performance.
In this role you will work closely with Algo, SW, HW, RF and system validation teams and
be expected to work in a fast-paced challenging environment.
Responsibilities:
Deep understanding of PHY algorithms
Planning and executing PHY system tests - Algo, HW, RF, SW
Tuning and verifying system features, performance and functionality
Building lab setups for these system tests and operating lab equipment
Independent debugging and analyzing results using MATLAB, Python or Excel

we are looking for a Senior VLSI Design Engineer.
As a Senior VLSI Designer, youll lead the full design flow of advanced DSP cores and accelerator- from architecture to timing closure. This hands-on role is key to developing the IPs behind the next-generation products, with strong cross-functional collaboration and technical ownership.
Responsibilities:
As a Senior VLSI Designer, you will be responsible for the end-to-end design and implementation of advanced digital IPs, including DSP cores and hardware accelerators. You will work across the full design flow- from architecture definition and micro-architecture design, through RTL development and verification, to synthesis, timing closure, and static timing analysis (STA). Your work will directly contribute to the silicon success of next-generation products across various domains.

We are seeking an experienced and hands-on Senior RF Automation Engineer with strong, proven Python expertise to join our R&D team.
This role is focused on building and maintaining advanced automated test solutions for RF systems. You will architect, develop, and execute automation frameworks and tooling to validate complex RF designs and ensure world-class product reliability and performance.
This position is ideal for a self-driven engineer with a deep understanding of RF measurement techniques and a strong software development mindset. You will play a critical role in shaping our automation strategy and influencing next-generation RF product development.
Key Responsibilities:
Lead the development and maintenance of Python-based automated RF test frameworks, tools, and scripts.
Design, execute, and optimize RF test environments and automated test stations.
Configure, calibrate, and operate RF test equipment such as Vector Signal Generators (VSGs), Spectrum Analyzers (SAs), and related instruments.
Create and validate RF test setups for performance validation, debug, and system characterization.
Analyze complex RF datasets, generate detailed reports, and communicate results to R&D leadership and cross-functional teams.
Collaborate with hardware, firmware, and software teams to embed automated testing into the entire development lifecycle.
Continuously enhance automation efficiency, coverage, and capability-leveraging best-practice testing methodologies.
Research and introduce innovative RF automation tools, frameworks, and workflows aligned with R&D goals.

we are looking for a R&D Project Manager.
In this role, you will be managing the MBBU projects involving multiple domains including: VLSI architecture, VLSI Design, VLSI verification, VLSI backend, Algorithms and Software. These projects include development of products like cellular modems, Communication Digital Signal Processors and Radar/Lidar baseband with a total of up to 100 R&D engineers involved.
This role is reporting to the MBBU General Manager.
Responsibilities :
Full ownership on all R&D projects of the Mobile Business Unit, including Software, VLSI and Algorithms tasks.
Direct management for the PMO

We are seeking a highly skilled and motivated Team Leader - Python Automation Infrastructure and testing to join our R&D organization. This role is central to building and leading our automation Infrastructure and testing, ensuring robust test coverage across SW components, integration, system, and end-to-end levels.
The successful candidate will provide both technical leadership and hands-on contribution-mentoring a team of automation engineers, establishing best practices, writing automated tests, and driving adoption of modern automation tools based Python and CI/CD methodologies. While the primary focus is integration automation, knowledge of RF systems/Cyber and DevOps is a strong plus.
Key Responsibilities:
Bachelor's degree in Computer Science or related field.
Lead and mentor a team of automation engineers, setting technical direction, assigning tasks, and supporting professional growth.
Architect, implement, and maintain scalable automation frameworks using Python and Pytest.
Write, review, and optimize unit, integration, and regression test cases to ensure high-quality software delivery.
Oversee automation of system-level and end-to-end testing, including API and UI layers (Selenium preferred).
Design and maintain CI/CD pipelines with Jenkins, Docker, and Git, ensuring automated testing is integrated into every stage of development.
Collaborate closely with software developers, RF, QA, DevOps, and hardware teams to embed testing and automation best practices into the product lifecycle.
Define, track, and report test metrics such as coverage, execution reliability, and defect detection effectiveness.
Promote a culture of quality and continuous improvement, introducing new tools and practices to strengthen automation.
Act as a technical expert, conducting code reviews and ensuring adherence to coding/testing standards.

We are seeking an experienced and visionary Head of Hardware Group to lead a multi-disciplinary hardware team (Digital, Mechanical, and RF).
The role requires a strong technical background, proven leadership skills, and the ability to drive innovative, high-quality hardware solutions from concept to production.
This position combines hands-on involvement with strategic management, ensuring the successful delivery of complex products in dynamic and demanding environments.
Principle Duties and Responsibilities:
Lead and manage a multi-disciplinary hardware group (Digital, Mechanical, and RF), including recruitment, mentoring, performance evaluation, and career development.
Define group strategy, methodologies, and KPIs to align with company goals.
Provide technical leadership in system architecture, design reviews, and troubleshooting complex challenges across domains.
Oversee the end-to-end product lifecycle: concept definition, system architecture, schematic design, PCB layout, mechanical design, integration, validation, and transition to production.
Drive innovation and adoption of new technologies, tools, and design methodologies.
Manage schedules, resources, and priorities to ensure timely delivery and budget compliance.
Build strong collaboration with FPGA, software, system engineering, validation, and operations teams.
Ensure compliance with product certifications and regulatory standards (CE, FCC, Mil-461, etc.).
Represent the HW group in executive management forums and in front of customers, partners, and subcontractors.
Establish a culture of ownership, accountability, and continuous improvement within the group.

We seek a highly motivated and experienced System Architect specializing in Data-Center, AI Fabric, and Ethernet Networking to join our team of experts and help shape the future of high-performance ML/AI computing. You will have the opportunity to work on some of the most pioneering technologies and help drive the innovation of our next-generation networks. You will play a key role in defining end-to-end solutions, networking protocols and features, interworking with orchestration systems, and help address new business opportunities in exciting areas. Our Architects also represent us in open-source projects, technical conferences, and standard development organizations.

What you'll be doing:

Explore new technologies and end-to-end solutions for our Ethernet Networking Platforms.

Be familiar with data-center and AI fabric network topologies, AI/ML clusters operation and network usage, as well as with the Ethernet Switch platforms' design and characteristics.

Define robust architectures and technical requirements for network operating systems and end-to-end solution offering for AI/ML workloads' needs and highly performing network operations.

Lead the work with R&D and Validation teams, providing technical guidelines and close support and thorough reviews for detailed designs and test plans.

Collaboration with architects across various fields, including Chip Design, Firmware, Hardware Platforms, and System teams.

Close work with product marketing, program managers, and account managers to ensure the successful execution of projects.

Support engagements with key customers, issue patents, publish white papers and blogs, and be proactive in technical forums and industry working groups.

Promote innovation through the design and implementation of Proof-of-Concept (PoC).

We are looking for a hands-on leader to head a small team that builds simulation models for our next-generation AI hardware and DSP. Modeling is done in several layers, from cycle-accurate, bit-exact block level modeling, to event-driven full IP system flows.
Your groups mission is to take part in the exploration phase of a project, giving architects rapid, high-fidelity feedback so they can explore design options, and to perform algorithmic regression, detecting deadlocks, sweep parameters and features, and understand system-level impact in a quickly adapting, dynamic development environment.
Beyond pure performance modeling, youll keep a sharp eye on functional accuracy and QA, follow emerging academic and industry trends, and inject the relevant insights into the product.
You will also champion modern AI-assisted coding tools (e.g., Cursor AI, GitHub Copilot) to lift the productivity of the senior software engineers on your team and shorten iteration cycles.
Responsibilities:
Lead and mentor a team of simulation and modeling engineers; set goals, review designs, and remove roadblocks. Design and implement transactional / cycle-accurate / bit-exact / event-driven models that faithfully represent advanced AI IP blocks (Transformers, CNN accelerators, custom DMA, interconnects, power-management units, etc.). Build automated flows to sweep architectural parameters and features, collect metrics, and visualize system-level impact on performance, area, power, and bandwidth. Analyze and debug complex issues such as deadlocks, race conditions, and performance hotspots; deliver concise root-cause reports and actionable recommendations. Collaborate daily with architecture, VLSI, compiler, and firmware teams to translate new algorithms and hardware ideas into model requirements and specifications. Own accuracy and QA of the simulation stack: golden-model alignment, coverage tracking, regression health, and release sign-off. Continuously survey academic papers and industry trends, extract meaningful insights, and propose innovative modeling techniques or architectural directions. Promote the adoption of AI-powered development tools to accelerate coding, code-review, documentation, and test generation across the team.