דרושים » חשמל ואלקטרוניקה » R&D Project Manager

we are looking for a Senior VLSI Design Engineer.
As a Senior VLSI Designer, youll lead the full design flow of advanced DSP cores and accelerator- from architecture to timing closure. This hands-on role is key to developing the IPs behind the next-generation products, with strong cross-functional collaboration and technical ownership.
Responsibilities:
As a Senior VLSI Designer, you will be responsible for the end-to-end design and implementation of advanced digital IPs, including DSP cores and hardware accelerators. You will work across the full design flow- from architecture definition and micro-architecture design, through RTL development and verification, to synthesis, timing closure, and static timing analysis (STA). Your work will directly contribute to the silicon success of next-generation products across various domains.

We are seeking a highly skilled and motivated VLSI Backend Team Leader to join and lead our dynamic team.
As part of this position, you will lead a team of experienced engineers working on parallel projects, and play a crucial role in the design and implementation of complex designs, flow development, and the latest technology node bring-up and integration.
The Backend team leader will be required to do 50% hands on work and 50% managerial work.

we are looking for a Senior Hardware Architect for Mobile broadband.
As a senior architect you will be a leader, someone who brings into the company new ideas and helps drive next generation wireless products
Responsibilities:
Be a leader in the Mobile Broadband team, architecting state-of-the-art modems for next generation cellular solutions. Investigate, invent, develop, innovate wireless modem components. Drive the implementation phase with the VLSI, Software and Algorithm teams.

We are looking for a hands-on leader to head a small team that builds simulation models for our next-generation AI hardware and DSP. Modeling is done in several layers, from cycle-accurate, bit-exact block level modeling, to event-driven full IP system flows.
Your groups mission is to take part in the exploration phase of a project, giving architects rapid, high-fidelity feedback so they can explore design options, and to perform algorithmic regression, detecting deadlocks, sweep parameters and features, and understand system-level impact in a quickly adapting, dynamic development environment.
Beyond pure performance modeling, youll keep a sharp eye on functional accuracy and QA, follow emerging academic and industry trends, and inject the relevant insights into the product.
You will also champion modern AI-assisted coding tools (e.g., Cursor AI, GitHub Copilot) to lift the productivity of the senior software engineers on your team and shorten iteration cycles.
Responsibilities:
Lead and mentor a team of simulation and modeling engineers; set goals, review designs, and remove roadblocks. Design and implement transactional / cycle-accurate / bit-exact / event-driven models that faithfully represent advanced AI IP blocks (Transformers, CNN accelerators, custom DMA, interconnects, power-management units, etc.). Build automated flows to sweep architectural parameters and features, collect metrics, and visualize system-level impact on performance, area, power, and bandwidth. Analyze and debug complex issues such as deadlocks, race conditions, and performance hotspots; deliver concise root-cause reports and actionable recommendations. Collaborate daily with architecture, VLSI, compiler, and firmware teams to translate new algorithms and hardware ideas into model requirements and specifications. Own accuracy and QA of the simulation stack: golden-model alignment, coverage tracking, regression health, and release sign-off. Continuously survey academic papers and industry trends, extract meaningful insights, and propose innovative modeling techniques or architectural directions. Promote the adoption of AI-powered development tools to accelerate coding, code-review, documentation, and test generation across the team.

We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

Our Networking BU is looking for Senior Software Program Manager that will be responsible for software programs and projects. The PM should drive planning and execution of FW/SW projects while aligning with corporate priorities and constraints.

Our Mellanox Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer best-in-class solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, big data and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. Our product line is focusing on delivering the most optimized Ethernet solutions for industries like Media and Entertainment as well as any other industry that can benefit from our Datastream and TCP/IP acceleration.

What you'll be doing:
You will manage the networking software programs for our next generation AI Data centers.
Responsible to coordinate between all project stakeholders such as marketing, engineering teams in IL and around the world, operations, etc. from initial requirements definition through Architectural stage, execution, and delivery.
Develop and execute feature planning and prioritization of perception capabilities to meet the software programs' needs.
Identify risks, gaps, and bottlenecks in time, and find resolution with technical leaders and project management.
Work with product managers, architects, and engineers to ensure consistency with company strategy, commitments, and goals.

We are seeking an experienced and visionary Head of Hardware Group to lead a multi-disciplinary hardware team (Digital, Mechanical, and RF).
The role requires a strong technical background, proven leadership skills, and the ability to drive innovative, high-quality hardware solutions from concept to production.
This position combines hands-on involvement with strategic management, ensuring the successful delivery of complex products in dynamic and demanding environments.
Principle Duties and Responsibilities:
Lead and manage a multi-disciplinary hardware group (Digital, Mechanical, and RF), including recruitment, mentoring, performance evaluation, and career development.
Define group strategy, methodologies, and KPIs to align with company goals.
Provide technical leadership in system architecture, design reviews, and troubleshooting complex challenges across domains.
Oversee the end-to-end product lifecycle: concept definition, system architecture, schematic design, PCB layout, mechanical design, integration, validation, and transition to production.
Drive innovation and adoption of new technologies, tools, and design methodologies.
Manage schedules, resources, and priorities to ensure timely delivery and budget compliance.
Build strong collaboration with FPGA, software, system engineering, validation, and operations teams.
Ensure compliance with product certifications and regulatory standards (CE, FCC, Mil-461, etc.).
Represent the HW group in executive management forums and in front of customers, partners, and subcontractors.
Establish a culture of ownership, accountability, and continuous improvement within the group.

we are looking for a Senior System Engineer.
Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication protocols.
Define requirements and guide multi-disciplinary teams (SW, Algorithms, DSP, and FPGA) through implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like MATLAB, Python, Excel, and other log analysis software.
Create and maintain comprehensive system-level documentation.
Gain a deep understanding of the full system to guide and support testing and validation teams, helping define methodologies, tools, and coverage strategies.

We are seeking an experienced Software Team Leader to lead the design, implementation, and optimization of our graph compiler key backend functionalities. You will own and drive the development of compiler infrastructure that transforms high-level computational graphs into efficient, hardware-optimized execution flows. This role combines deep technical leadership with people management responsibilities.
Responsibilities:
Take full ownership of key components within the graph compiler backend. Lead, mentor, and grow a team of talented software engineers; set priorities, review designs, and ensure timely, high-quality delivery. Drive the definition and the implementation of backend compiler architecture to support various graph IR transformations, optimization passes, and hardware abstractions. Lead the identification and implementation of compiler-level optimizations to maximize performance and efficiency of workloads on target hardware. Drive clear and transparent work planning by balancing performance goals and time-to-market considerations, fostering a proactive can-do mindset across the team. Establish best practices for code quality, testing, documentation, and continuous integration within the compiler team. Work closely with frontend compiler, runtime, architecture and hardware design teams to ensure seamless integration across the software stack.

we are seeking an excellent Firmware Manager to join to GPU networking (NVLink) FW group in Tel-Aviv / Raanana. You will have the opportunity to lead development team responsible for the firmware of the next-generation networking products while being hands-on with development activities. We drive the data growth of the worlds biggest companies. With dedicated engineers around the globe, the work environment is dynamic, exciting, and fast-paced. Are you ready for the challenge?
What you will be doing:
Lead a team of engineers and provide technical guidance to the team of highly skilled engineers. Empower the team members to excel and increase team productivity.
Lead the design and implementation of new features in the core of our company GPU Networking firmware.
Drive and facilitate the planning, scheduling, and execution of the project and activities of the team
Collaborate with architecture and different software design teams as part of the software development lifecycle.
Work in pre and post-silicon development environments of next-generation our company GPU networking products.
Gain a deep understanding of networking technology, system debugging, and stacks, as well as the HW/FW/SW relationship.
Innovate! Bring our companys Networking products to shine in customers view.