דרושים » הנדסה » Senior Communication PHY Algorithms Engineer

we are looking for a Senior System Engineer.
Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication protocols.
Define requirements and guide multi-disciplinary teams (SW, Algorithms, DSP, and FPGA) through implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like MATLAB, Python, Excel, and other log analysis software.
Create and maintain comprehensive system-level documentation.
Gain a deep understanding of the full system to guide and support testing and validation teams, helping define methodologies, tools, and coverage strategies.

Were seeking passionate professionals who thrive in a fast-paced, creative, and collaborative environment - those who want to be part of the next generation of airspace security innovation.
Responsibilities:
Design and implement sophisticated digital signal processing algorithms for applications in areas such as signal processing and wireless communication physical layer.
Collaboration with a multi-disciplinary teams (algorithm engineers, systems engineers, SW engineers, etc.) to design and integrate challenging DSP algorithms for wireless systems.
Enforce high standards for software architecture, ensuring the DSP codebase is scalable, modular, testable, and maintainable.
Conduct thorough performance analysis and optimization of existing DSP systems, identifying opportunities for improvement.
Write clean, efficient, and maintainable code for production systems.
A proactive approach to innovation and a passion for developing high-quality products.

We are looking for a talented and experienced PHY system integration engineer with a can do attitude to join our growing, highly motivated and skilled PHY team. The system PHY integration engineer will work closely with the PHY algo group.
The members of this
group are highly skilled, experienced individuals who are keen to pass on their knowledge. The team is responsible for learning and understanding of PHY algorithms and defining PHY system tests for analyzing, tunning and verifying these algorithms and full system
behavior and performance.
In this role you will work closely with Algo, SW, HW, RF and system validation teams and
be expected to work in a fast-paced challenging environment.
Responsibilities:
Deep understanding of PHY algorithms
Planning and executing PHY system tests - Algo, HW, RF, SW
Tuning and verifying system features, performance and functionality
Building lab setups for these system tests and operating lab equipment
Independent debugging and analyzing results using MATLAB, Python or Excel

We are seeking an experienced and hands-on Senior RF Automation Engineer with strong, proven Python expertise to join our R&D team.
This role is focused on building and maintaining advanced automated test solutions for RF systems. You will architect, develop, and execute automation frameworks and tooling to validate complex RF designs and ensure world-class product reliability and performance.
This position is ideal for a self-driven engineer with a deep understanding of RF measurement techniques and a strong software development mindset. You will play a critical role in shaping our automation strategy and influencing next-generation RF product development.
Key Responsibilities:
Lead the development and maintenance of Python-based automated RF test frameworks, tools, and scripts.
Design, execute, and optimize RF test environments and automated test stations.
Configure, calibrate, and operate RF test equipment such as Vector Signal Generators (VSGs), Spectrum Analyzers (SAs), and related instruments.
Create and validate RF test setups for performance validation, debug, and system characterization.
Analyze complex RF datasets, generate detailed reports, and communicate results to R&D leadership and cross-functional teams.
Collaborate with hardware, firmware, and software teams to embed automated testing into the entire development lifecycle.
Continuously enhance automation efficiency, coverage, and capability-leveraging best-practice testing methodologies.
Research and introduce innovative RF automation tools, frameworks, and workflows aligned with R&D goals.

We are seeking an experienced and visionary Head of Hardware Group to lead a multi-disciplinary hardware team (Digital, Mechanical, and RF).
The role requires a strong technical background, proven leadership skills, and the ability to drive innovative, high-quality hardware solutions from concept to production.
This position combines hands-on involvement with strategic management, ensuring the successful delivery of complex products in dynamic and demanding environments.
Principle Duties and Responsibilities:
Lead and manage a multi-disciplinary hardware group (Digital, Mechanical, and RF), including recruitment, mentoring, performance evaluation, and career development.
Define group strategy, methodologies, and KPIs to align with company goals.
Provide technical leadership in system architecture, design reviews, and troubleshooting complex challenges across domains.
Oversee the end-to-end product lifecycle: concept definition, system architecture, schematic design, PCB layout, mechanical design, integration, validation, and transition to production.
Drive innovation and adoption of new technologies, tools, and design methodologies.
Manage schedules, resources, and priorities to ensure timely delivery and budget compliance.
Build strong collaboration with FPGA, software, system engineering, validation, and operations teams.
Ensure compliance with product certifications and regulatory standards (CE, FCC, Mil-461, etc.).
Represent the HW group in executive management forums and in front of customers, partners, and subcontractors.
Establish a culture of ownership, accountability, and continuous improvement within the group.

We are seeking a highly skilled and motivated Team Leader - Python Automation Infrastructure and testing to join our R&D organization. This role is central to building and leading our automation Infrastructure and testing, ensuring robust test coverage across SW components, integration, system, and end-to-end levels.
The successful candidate will provide both technical leadership and hands-on contribution-mentoring a team of automation engineers, establishing best practices, writing automated tests, and driving adoption of modern automation tools based Python and CI/CD methodologies. While the primary focus is integration automation, knowledge of RF systems/Cyber and DevOps is a strong plus.
Key Responsibilities:
Bachelor's degree in Computer Science or related field.
Lead and mentor a team of automation engineers, setting technical direction, assigning tasks, and supporting professional growth.
Architect, implement, and maintain scalable automation frameworks using Python and Pytest.
Write, review, and optimize unit, integration, and regression test cases to ensure high-quality software delivery.
Oversee automation of system-level and end-to-end testing, including API and UI layers (Selenium preferred).
Design and maintain CI/CD pipelines with Jenkins, Docker, and Git, ensuring automated testing is integrated into every stage of development.
Collaborate closely with software developers, RF, QA, DevOps, and hardware teams to embed testing and automation best practices into the product lifecycle.
Define, track, and report test metrics such as coverage, execution reliability, and defect detection effectiveness.
Promote a culture of quality and continuous improvement, introducing new tools and practices to strengthen automation.
Act as a technical expert, conducting code reviews and ensuring adherence to coding/testing standards.

we are building state-of-the-art accelerated computing platforms that know no boundaries. Our technology is crucial for global innovators, scientists, researchers, and engineersempowering them to transform their boldest concepts into tangible outcomes. Our next-generation Infiniband, NVLink, and Ethernet systems will continue to be at the forefront of connecting and powering the world's most advanced AI clusters.
We seek a highly motivated and experienced Software Architect specializing in Ethernet Switch ASICs to join our team of experts and help shape the future of high-performance ML/AI computing. You will have the opportunity to work on some of the most pioneering technologies and help drive the innovation of our next-generation networks. You will play a key role in defining switching software stacks and Linux kernel networking, and help address new business opportunities in exciting areas. Our Architects also represent our company in open-source projects, technical conferences, and standard development organizations.
What you'll be doing:
Explore networking technologies, features and protocols, hardware/software capabilities, open-source software and drivers for our Ethernet Switch ASICs and Networking platforms.
Be familiar with the Ethernet Switch ASIC hardware and software stacks, as well as with the Ethernet Switch platforms design and characteristics.
Define robust architectures and technical requirements for embedded software, meeting AI/ML workloads' needs and highly performing network operations.
Lead the work with R&D and Validation teams, providing technical guidelines and close support and thorough reviews for detailed designs and test plans.
Collaboration with architects across various fields, including Chip Design, Firmware, Hardware Platforms, and System teams.
Close work with product marketing, program managers, and account managers to ensure the successful execution of projects.
Support engagements with key customers, issue patents, publish white papers and blogs, and be proactive in technical forums and industry working groups.
Promote innovation through the design and implementation of Proof-of-Concept (PoC).

Israel Multimedia-Complex (MMPLEX) Group is a distinguished collective dedicated to seeding advanced and unparalleled technologies, including video engines, streaming, time synchronization, and more. Our primary mission is to research, invent, chart the technological course, and architect both the algorithms and the hardware required to bring these innovations to fruition.
We are on the hunt for a Software Engineer who brings on board extensive experience across relevant software domains and is passionate about innovation. This is a golden opportunity to make your contribution to developing innovative technologies designed for integration into our companys elite consumer and data center products. As a part of our team, you will play an active role in patenting new knowledge and safeguarding our intellectual property.
Join us in pioneering the data center technologies of the future!
What you'll be doing:
Build and maintain Python-based tools, workflows, and frameworks used by algorithm and architecture teams.
Lead and mentor engineers in software development, performance optimization, and workflow guidelines.
Define and improve development environments across Linux, containers, build flows, and internal compute systems.
Integrate algorithmic and architectural developments into production software (SDK, UMD, and occasionally bare-metal firmware).
Work hands-on with C/C++ and low-level components to ensure smooth integration with hardware and system architecture.

We are seeking a highly motivated SoC Architect to join our team and define the next generation of our companys high-performance networking SoCs. Our Ethernet and NVL switch silicon powers the world's most advanced AI compute clusters - from hyperscale GPU systems used to train and inference massive foundation models, to the AI factories shaping the future of computing.
As an SoC Architect at our company, you will drive end-to-end SoC definition, connecting system-level requirements with chip-level implementation across multiple domains. You will work closely with cross-functional teams to craft scalable, power-efficient, and feature-rich SoCs that enable the next leap in networking and AI infrastructure.
What You'll Be Doing:
Lead SoC architecture across multiple teams and disciplines - including firmware, security, debug, power management, and peripheral/IP owners - ensuring holistic architectural alignment and system coherence.
Ensure next-generation architectures meet the requirements and constraints of all stakeholder teams, and drive clear specification and communication of those requirements.
Architect and analyze multi-chip solutions, including die-to-die connectivity, chip partitioning, package/board constraints, system requirements, chip fabric, PCIe subsystem and how SoC subsystems must support them.
Define top-level SoC structure: subsystem partitioning, interconnect, memory subsystem, coherency, clocking, power architecture, and system integration.
Define system flows: power up sequences, boot sequences, software update.
Own the SoC architecture specification and guide it throughout the entire product lifecycle - concept, modeling, implementation, and silicon bring-up.
Perform trade-off analyses across performance, area, power, and feature complexity to drive architectural decisions.
Collaborate deeply with chip architects, logic design, verification, physical design, firmware, and system software to ensure seamless integration of all SoC components.
Contribute to innovation and long-term architectural direction, including patent development.

we are looking for a dedicated SoC Clocks Design Automation Engineer to join our Networking Silicon team. In this role, youll focus on developing and supporting clock-related design flows and methodologies for SoC and networking chips, ensuring efficient and high-quality design implementation. Youll also chip in to SoC top-level automation and integration activities, building on existing flow infrastructure to improve efficiency and consistency across projects. Introduction
What you'll be doing:
Develop and maintain design automation and methodologies for SoC and networking clock flows.
Collaborate with design, STA, and project teams to ensure timely and high-quality design closure.
Develop and improve SoC top-level automation scripts and flows built upon existing infrastructure and tools.
Support SoC integration and construction flow activities across multiple projects.
Assist in timing, power, and noise analysis to ensure efficient performance.