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We are looking for a passionate AI Researcher to lead end-to-end of research and development of our proprietary machine learning-based algorithms for off-road autonomous vehicles. Experimenting, designing a solution, leading a POC, implementing the training pipeline and providing an optimized, production ready AI based solution.

Responsibilities - what you will be doing:
Conduct applied research in multi-modal domains to enhance our autonomous capabilities. Specifically, you will be applying SOTA Machine Learning and Reinforcement Learning techniques for tasks of perception, navigation, and planning This multi-modality includes the full sensory-stack of our vehicles (lidar, cameras, localization sensors, etc.).
Implement pipelines to achieve robust production level models from simulative and real data preparation, through implementing tailor-made networks or adapting and modifying existing networks, optimizing learning parameters and evaluating performance.
Deploy trained models to accelerated inference environments using various optimization and quantization techniques.
Take a meaningful part in designing and implementing our Machine Learning infrastructure, frameworks, and evaluation tools.

As a member of the Regulatory Affairs Department the Systems Regulatory Compliance Engineer will be part of the Hardware products Global Market Access team, responsible for escorting hardware design, certifying products towards global standards, verifying health and environmental regulations compliance, and testing for electromagnetic & radio compatibility.
Essential Duties and Responsibilities:
To monitor, interact, report, and support R&D, Engineering, and regional teams that inquire about aspects of compliance matters, enforcement actions, remedial activities, and regulatory compliance affairs.
Lead product evaluations and tests by operating external laboratories, advisors, and subcontractors to meet relevant Safety, EMC, and Environmental certifications.
Perform product safety reviews, and preliminary safety testing, facilitate agency inspections, and maintain product regulatory compliance files.
Evaluate regulatory trends and revisions.
Preparation of Technical files including the creation of a Critical Component List

Do you want to be part of an exciting and growing support team and help customers with the development of complex schematic and PCB designs?

As Senior Application Engineer (AE), you will be responsible for pre-sale and/or post-sale support for Schematic Entry, PCB Design and Libraries for Electronic Design Automation tools used to design printed circuit boards.

You will work closely with top tier customers supporting technical campaigns for pre-sale by creating and conducting technical presentations, product demonstrations, training, knowledge transfer, services delivery, and onsite support. Provide direct technical post-sale support as part of the European team. Advocate and negotiate bug/enhancement resolution with R&D.
You provide direct expert level technical post-sale support for PCB products, technologies, design flows and design methodologies. In this role, you will work both independently and in collaboration with German, other European team members and R&D to address customer issues.
You should be able to act as strong team member and contributor, participate in team projects and initiatives. You will need to be an excellent communicator with a good electronics background & experience of PCB design using CAD software. Expertise in Schematic Entry and PCB Design (Allegro PCB) is a must, knowledge of Signal Integrity is an added advantage.

We are looking for an Application Engineer to focus on Digital Verification and Design.



As our Application Engineer (AE), youll play a pivotal role as the bridge between Siemens EDA and our customers. This dynamic and challenging position demands profound technical expertise, robust communications, and exemplary business skills. Collaborating with businesses spanning diverse technology sectors, youll assist our customers in tackling technical and business challenges using Siemens EDA's cutting-edge verification solutions. As part of our technical sales team, you'll contribute to the growth of Siemens EDA's functional verification business in Europe by ensuring the successful adoption and expansion of our products and services.



This position is based in Israel, hybrid working is available, but you will need to visit our office in Herzliya, as well as visit customer sites across Israel.



Who You Are

Driving business for Siemens EDA using hands-on technical expertise. This requires working directly with customers as a part of an account team.
Providing customer verification methodology guidance, verification tools training, and verification problem identification & resolution.
Building & maintaining relationships with customers, understanding their technical needs & challenges.
Managing multiple customer issues concurrently, prioritizing activities as required. Work with design & verification engineers as well as their level managers.
Providing technical feedback to Siemens EDA product development teams relating to critical issues and recommended product enhancements.

We are looking for a Senior Project Manager to join the Israeli Clusters team. The project manager will be responsible for the definition, planning and execution of multidisciplinary projects for building our clusters in Israel. Direct communication with Architecture, R&D, Operations, Finance, IT, Security, and all relevant stakeholders within and outside of us. Accountable and responsible for the success of the relevant Cluster build programs.

What You'll Be Doing:

Own entire activities associated with planning and executing projects for building large Clusters for us in Israel.

Co-work with our teams on different disciplines associated with building large scale clusters Data-Center Engineering, Data-Center Operations, Corporate-IT, Planning, Finance and more

Manage periodic sync meetings within us and with external stakeholders to track and monitor projects meetings.

Present project status to our senior executive team.

Matrix management of internal teams and resources for successful execution of projects and activities.

We are the world-leader fast-growing company which supports the most powerful super computers in the world. We make outstanding artificial intelligence and make the most outstanding applications happen just ask ChatGPT.

We believe in our people and products and seek excellent people to join us!

The Networking Application Engineering team is looking for a hardworking, keen engineer to join the team and support groundbreaking technology.

As Networking Optical Application Engineer, one will have a real impact on the business, while working closely with our customers and R&D teams.

What youll be doing:

Support new supercomputers and AI fabrics technologies.

Gain our customers trust and understand their needs.

Work closely with various R&D teams and develop solutions per our customers needs.

Lead the way on cooperations between different teams within the company.

Solve complex issues while leading highly visible customer issues.

Provide constructive feedback to engineering and marketing regarding products requirements.

We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon engineering team. We are developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join accelerators IP group in Beer-Sheva, working on RiscV processor IPs.

Verification for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.

Daily work might involve any or all aspects of chip development: Verification, Design.

Work closely with Firmware and other groups around the globe.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The company`s System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.


What you'll be doing:

Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.

Taking part in flows development and deployment.

We arw looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

We are looking for best-in-class Senior VLSI integration Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Implement Chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design) .

Be exposed and work on a variety of functional and structural challenges. Including functional debug, getting ready for physical design, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks

Taking part in flows development and deployment

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group.

As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Build reference models, verify and simulate chip blocks/entities according to specifications.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.