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We are seeking an experienced Signal/Image Processing and Machine Learning engineer to join our team. The role focuses on developing innovative, real-time deep learning and signal processing solutions for new sensing and imaging systems, including video restoration. You will be part of an interdisciplinary team developing technologies that will shape future Apple products.
Description
Algorithm and model development:
- Design, implement, and optimize signal processing and machine learning models for sensing and imaging tasks, including video restoration.
- Develop and validate models using real sensor data, simulated data, and public datasets.
- Prepare, filter, process, and analyze large-scale datasets to train and evaluate models.
- Analyze your algorithm's results and benchmark them against leading methods, and theoretical bounds.
- Optimize models for real-time performance, low latency, and resource efficiency on-device.

Sensing and research:
- Develop algorithms that combine classical signal processing with learned models to extract robust information from sensor data.
- Investigate efficient architecture patterns (lightweight backbones, attention mechanisms, recurrent designs) suitable for real-time, on-device inference.
- Explore how algorithmic approaches can mitigate artifacts and limitations of new sensing and imaging systems.
- Stay current with recent advances in signal processing, computer vision, and machine learning.

Collaboration and technical leadership:
- Work closely with ML researchers, SW, HW, sensor, and architecture engineers to translate research ideas into robust models and practical, shipping systems.
- Provide technical guidance and mentorship to junior engineers, and help shape the team's technical direction.

Responsibilities
- Own the end-to-end development of real-time algorithms, from concept and prototyping through validation and deployment.
- Define evaluation methodology, metrics, and failure analysis processes for sensing and imaging algorithms.
- Drive trade-off decisions among accuracy, latency, power, and memory across algorithm, HW, and system constraints.

We are seeking an experienced Signal/Image Processing and Machine Learning engineer to join our team. The role focuses on developing innovative, real-time deep learning and signal processing solutions for new sensing and imaging systems, including video restoration. You will be part of an interdisciplinary team developing technologies that will shape future Apple products.
Description
Algorithm and model development:
- Design, implement, and optimize signal processing and machine learning models for sensing and imaging tasks, including video restoration.
- Develop and validate models using real sensor data, simulated data, and public datasets.
- Prepare, filter, process, and analyze large-scale datasets to train and evaluate models.
- Analyze your algorithm's results and benchmark them against leading methods, and theoretical bounds.
- Optimize models for real-time performance, low latency, and resource efficiency on-device.

Sensing and research:
- Develop algorithms that combine classical signal processing with learned models to extract robust information from sensor data.
- Investigate efficient architecture patterns (lightweight backbones, attention mechanisms, recurrent designs) suitable for real-time, on-device inference.
- Explore how algorithmic approaches can mitigate artifacts and limitations of new sensing and imaging systems.
- Stay current with recent advances in signal processing, computer vision, and machine learning.

Collaboration and technical leadership:
- Work closely with ML researchers, SW, HW, sensor, and architecture engineers to translate research ideas into robust models and practical, shipping systems.
- Provide technical guidance and mentorship to junior engineers, and help shape the team's technical direction.

Responsibilities
- Own the end-to-end development of real-time algorithms, from concept and prototyping through validation and deployment.
- Define evaluation methodology, metrics, and failure analysis processes for sensing and imaging algorithms.
- Drive trade-off decisions among accuracy, latency, power, and memory across algorithm, HW, and system constraints.

We are looking for a hands-on engineer to join our Platform Architecture post-silicon team. This team analyzes and tunes the performance and power of Apple Silicon for the Mac, and takes the learnings and measurements to drive SoC architecture change for future chips. If you work comfortably across the hardware/software stack, and the idea to bring up brand-new chips that just arrived from the fab does not scare you but gets you excited, when we would like to hear from you.

You will join a multidisciplinary team of architecture, silicon design, and system software engineers driving the performance and energy efficiency of Apple SoCs. The work spans application software, system software, SoC architecture, and microarchitecture, and sits at the intersection of measured silicon behavior and forward-looking architecture definition. You will build a deep understanding of how current and planned Apple products behave end to end, and use it to influence both hardware and software direction.

Responsibilities
Tune and define SoC memory and fabric performance state controllers on unreleased silicon, and propose improved control and observability mechanisms for future generations.
Plan and execute architecture studies that drive performance and energy-efficiency decisions for future SoCs.
Build tools, workflows, and automation for repeatable analysis of simulated and measured data, including terabyte-scale traces from prototype devices.
Architect hardware features that improve workload characterization and enable robust online control of power and performance.
Debug complex interactions between system software and SoC hardware.
Assess the feasibility of future use cases, SoCs, and products.
Communicate findings across chip design, architecture, software, and system teams to enable data-driven decisions.

This role is for a Design Verification Engineer who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

The position is relevant to all our sites: Herzliya, Haifa and Jerusalem.

In this role, you will be responsible for ensuring bug-free first silicon for part of the IP and are expected to: Develop detailed test and coverage plans based on the micro-architecture Develop verification methodology suitable for the IP, ensuring a scalable and portable environment. Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage and more.

This role is for a analog IP lead who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of silicon development from definition to high quality production.


Specifying requirements and circuit architecture for analog blocks and sub-blocks of an IP, lab bring-up, characterization and debug, write specifications, test plans and characterization reports, work with chip design teams, system HW and SW design teams, ATE PE.

You will be responsible for:
Develop the circuit design of the IPs analog blocks following established design guidelines based on microarchitecture spec. Own all aspects of circuit design development.
Work and collaborate with other designers in the group to deliver results.
Work with FE & BE teams to ensure quality analog integration.
Work with power/performance and functional verification team to define and validate operation sequences.
Work with multi-disciplinary teams to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process.
Work with post silicon validation groups to ensure the design meets the power/performance targets.

We are looking for a HW Lead Engineer to help define, shape, and integrate cutting-edge solutions for the next generation of our cloud platforms.
As a Card Lead Engineer in the Nitro/K2 team you will be responsible for defining Annapurna Labs Network Interface Card (NIC) hardware for the Compute a storage servers type, owning the development and validation of Nitro cards, including readiness for mass production.
Youll provide leadership in new technologies of the HW interfaces, bringing them to large-scale deployment, in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and youll work with technical experts, senior leaders, and multiple areas of technology.


Key job responsibilities
- Own the design and sustain of the Nitro Smart Network Interface Card for CMRI vertical use cases.
- Work with joint design partners and manufacturing sites, to enable healthy mass production of the Nitro card.
- Review, identify, and qualify second-source electrical components, to enable continuity of supply.
- Analyze and debug design/manufacturing/integration issues.
- Continuously assess process capabilities and innovate to simplify processes, reduce costs, and shorten the time cycle of Nitro cards development and manufacturing.
- Collaborate with members of cross-functional teams, to gain knowledge and improve product design, processes, and quality.
- Work with customers, to optimize the entire value stream and put together joint processes that will lead to improved time cycle and lower costs.
- Willing to travel abroad one or two times a year, for a week at a time.

We are looking for talented engineers to join the Pre-silicon Verification team and help us technically lead the challenges of the next decade, developing a semiconductor platform based on revolutionary architecture, and taking part in the development of cutting-edge products within a disruptive system architecture.
Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment.

We're looking for a System Engineer with Software or Hardware Engineering background to be part of defining, shaping and integrating solutions to next generation of our cloud platforms.

We are looking for an exceptional engineer to own the development, testing, and monitoring of the manufacturing health of our Graviton server products. You will be part of a team integrating new silicon, hardware, firmware, and software into a revolutionary system architecture.

Key job responsibilities
Lead triage, debugging, and root cause analysis of systems in AWS data centers.
Enhance troubleshooting capabilities and drive closure of in-fleet problems.
Analyze customer workflows and requirements to provide targeted resolutions.
Collaborate with Annapurna Labs monitoring team and root cause teams to improve product quality and reliability in fleet operations.
Represent the customer voice by providing fleet operation insights and requirements to Annapurna Labs' ASIC design, software development, QA, and architecture teams.
Develop and maintain training materials, quality documentation, and collateral to improve in-fleet operations.
Design and implement tools and scripts to support projects and customize solutions based on requirements.
Travel as needed, approximately 2-4 times per year.

As a System Verification Software Engineer, you will join a unique team that works at the heart of chip development, at the HW/SW boundary, collaborating across teams to ensure our semiconductor platforms meet the highest standards before they reach production, as we lead the market with our cutting-edge devices.
Youll be part of a team that verifies Graviton chips across emulation, silicon, and AWS production fleets-developing the tests, automation, and debug tooling that give us confidence our features function correctly on real hardware.

Key job responsibilities
* Verify and validate Graviton chips in emulation, silicon, and post-production.
* Develop tests that ensure our features function as intended.
* Build automation and debugging tools for silicon regressions and bring-up.
* Collaborate with hardware design and software teams to identify, analyze, and resolve design issues and verification gaps.
* Debug failures across diverse platforms (emulation and silicon).

Join the Amazon family and take part in developing the next generation of products that will define the future of the cloud domain. As part of our team, you'll work on cutting-edge products built on disruptive system architecture, and have the opportunity to work with the technologies that power the world's largest cloud provider.
We offer a dynamic, open, and collaborative team environment that operates at a fast pace.
Annapurna Labs is looking for a talented Operations Shift Manager, Electrical Practical Engineer to join our test laboratory and help develop the semiconductor platform support that is based on revolutionary architecture.


Key job responsibilities
Work in a rotating shift pattern - morning, noon, evening, and night - according to operational requirements.
Perform setup of complex operational machinery.
Operate machinery and make adjustments to enhance performance.
Operate equipment in accordance with specific process flows.
Own troubleshooting management and debug sessions.
Support testing and automation processes for silicon products.
Perform routine lab equipment maintenance.
Conduct quality control based on performance reports, and maintain recording procedures and documentation.
Manage inventory, including stocktaking.
Identify opportunities to streamline lab operations, and define and build tools and processes as needed to improve efficiency for the lab and the team
Strong verbal and written communication skills.
Ability to perform hands-on manual tasks.
Good coaching and mentoring skills.
Organized and methodical.

In this role you'll design and build features that shape how customers discover products - tailored to their preferences, helping them find exactly what they need, even before they know they need it. We're defining how LLMs integrate into real-time personalization, how noisy behavioral signals become durable customer understanding, and how AI-powered experiences ship reliably at scale. You'll work across multiple technical teams, ship iteratively, and see your work in the hands of customers quickly. This organization values experimentation, moves fast, and gives engineers real ownership over what they build.

We are looking for a Software Development Engineer with sound technical judgment and a bias for action who takes ownership of problems end to end, communicates clearly, and cares about operational excellence - not just launching features, but making sure they hold up at scale. Someone who naturally raises the bar for the team: mentoring junior developers, advocating engineering best practices, and thinking beyond the immediate sprint.

Key job responsibilities
- Design, build, test, and operate production AI features used by multiple teams and operating at Amazon scale.
- Deliver end-to-end solutions with focus on maintainability, scalability, performance, and reliability.
- Collaborate with Product and Science to define experiences, run experiments, and iterate based on data.
- Build AI-powered experiences including personalized recommendations, relevance explanations, and knowledge-driven features using LLMs and generative AI.
- Define and implement measurement strategies including analytics events and experiment configurations to track engagement and retention.
- Navigate ambiguity and make sound technical decisions in a problem space where established patterns don't always apply.

As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )