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We're seeking an exceptional Software Engineer to join our GenAI infrastructure team supporting Annapurna Labs' development teams. What makes this role unique is your direct impact on AI-powered innovation - you'll be building intelligent systems that drive the development of next-generation cloud technologies.
You'll work at the fascinating intersection of GenAI and cloud platform development, implementing automation solutions that directly enhance the productivity of our engineers. Unlike typical roles, you'll have the opportunity to influence both AI implementation and core architecture while collaborating with cloud technology experts.
The position offers rare exposure to latest cloud computing technology combined with the latest advances in artificial intelligence. You'll be part of a team that values technical excellence, working in an environment where your ideas can quickly transform from concept to reality.
In this role you will create solutions that directly shape the way we work. You'll develop smart automation systems, implement AI-driven tools and workflows and be part of AI transformation.

Key job responsibilities:
* Architect and deploy AI-powered solutions and AWS cloud services that transform development workflows.
* Lead technical innovation by driving architectural decisions and GenAI technology adoption.
* Champion AI transformation across engineering teams through education and hands-on implementation.
* Partner with elite cloud teams to identify opportunities and deliver advanced solutions.
* Ensure system excellence through participation in on-call rotations and reliability initiatives.

We are looking for a Server K2 card Engineering Vendor & Infra lead to be part of defining, shaping and integrating solutions to next generation of our cloud platforms. Our success depends on our world-class server infrastructure; were handling massive scale and rapid integration of emergent technologies.

Key job responsibilities:
- Own K2 Vendor management: own vendor engineering logistics, samples management (order/allocation), RFP/Awards/$$, monitoring, planning (w Supply Chain global org), actual on-ground visits to monitor health, 2nd source components needs mapping (into the NPI team), vendor qual planning (cards per vendors).
- Own Engineering infra: test servers, test-stations, as integrator and first line towards Servers ODM, Data Center Operations (DCO), Network Engineering and K2 Quality and Reliability team.
- Collaborate cross-functionally with hardware engineering, firmware, capacity planning, and infrastructure operations to align deployment readiness with business objectives.
- Lead continuous improvement initiatives across Vendor selection, Vendor Management, Engineering Samples & Development Servers Processes.

We are looking for world class researchers with experience in one or more of the following areas - autonomous agents, API orchestration, Planning, large multimodal models (especially vision-language models), reinforcement learning (RL) and sequential decision making.

The Senior Optical Systems Engineer will have responsibility for working closely with the test cell development team to understand test hardware software and algorithms. The candidate will develop optical test instrumentation architecture for emerging markets within semiconductor test. Instrumentation may include laser sources, polarizers, optical fibers and connectors, optical sensors, photo-diodes, along with motion systems, cameras, and image-analysis software. As a member of the Silicon Photonics Engineering team, you will be a key player delivering test solutions and deployment at customers sites. You will be working closely with the customer engineers, Teradyne engineering and applications engineering to ensure on-time delivery.



Derive system requirements by interacting with customers to define requirements for new optical test products
Develop test methods for lab and production verification
Develop experimental setups with optical instrumentation
Work within cross-discipline teams to develop innovative products

Our team at the Huawei Computing Network Innovation Lab is looking for exceptional talent to join us and lead the development of next generation data centers. We create cutting-edge technologies that synergize software and hardware in tandem to accelerate compute, storage and networking at large-scale. We aim to drive innovations and deliver software defined infrastructure and algorithms to HPC, AI/ML, and Big Data applications.
We are looking for outstanding candidates with hands-on experience in development and optimization of AI frameworks. If you are a team player with excellent communication skills and motivation to revolutionize application performance, youre welcome on board!
What will you be doing?
Work as part of an innovative research team to analyze, develop, test and deploy improvements that enhance Huaweis distributed AI framework.
Develop optimizations that leverage hardware accelerator capabilities, minimize communication overhead and improve training/inference throughput
Push the boundaries of the state of the art in LLM performance and efficiency, including model compression and quantization
Analyze, profile and optimize the latest LLM AI algorithms, and implement as production-quality software libraries for latency-critical use-cases on next-generation hardware.
Work in a distributed computing environment to optimize for both scale-up (multi-device) and scale-out (multi-node) systems
Utilize advanced concepts such as Uncertainty Quantification, Mixed Precision Computing and Model Sparsity to improve performance and enable training of very large AI models
Collaborate with partners from top universities, and open-source communities to conduct state-of-the-art research.

our company, Huaweis Tel Aviv Research and Innovation Center, is looking for an experienced hands-on software architect with expertise in Cloud, AI, and Distributed Systems to join our AI-accelerated Cloud Storage group. The team designs and develops cutting-edge cloud technologies that power next-generation AI applications, optimizing performance, scalability, and efficiency.
The role involves both high-level system understanding and low-level grasp of the connection between storage and AI, to push the boundaries of cloud infrastructure for AI workloads. If you want to be part of something bigger, if you are a team player with excellent communication skills and the motivation to revolutionize AI-driven cloud technologies, youre welcome on board!
What Will You Be Doing?
Research, design, and innovate cloud-based AI acceleration technologies
Analyze AI application performance, identify bottlenecks, and optimize decision-making mechanisms
Collaborate with other engineers to develop AI optimizations, Storage backend and related POCs.
Investigate global trends in AI infrastructure and cloud computing to shape long-term architecture
Collaborate with global teams on next-generation cloud solutions for AI.

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

Looking for a CPU Architect for codesign of HW/SW feature for our CPUs for cellphones and servers. The role includes but is not limited to:
Analysis of technical challenges and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions (when applicable) in coordination with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts. (the HW/SW features are typically in the form of new instructions or of other Instruction Set constructs and belong to one of following domains: dense compute, general purpose accelerations, use case specific accelerations, system level instructions, Security related technologies, or instrumentation instructions.
Models CPU functionality, performance and power in simulators, analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

We are looking for an experienced and creative AI processor VLSI Architect to architect and model the core of our next generation processors.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.