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Maytronics is a global company, a world leader in the pool cleaners industry. We are looking for a Hardware Engineer for design, development, implementation, verification, and validation Embedded electrical board and systems for the new generation of Maytronics robots and products. From the board design according to the system requirement thru the final product in the production line launching.

we are a global leader in the development and manufacturing of advanced infrared detectors and electro-optical solutions for defense and commercial applications.
We are seeking a skilled board designer with extensive experience in high-speed digital design to join our Board Design R&D Team. In this role, you will define system and hardware requirements, design FPGA-based hardware platforms, and validate high-speed interfaces such as DDR4, USB3, Ethernet, MIPI, and Camera Link. You will work closely with firmware, software, and mechanical engineers to deliver robust, production-ready Embedded systems for advanced electro-optical products.
Key Responsibilities
Define hardware requirements and prepare detailed design documentation for FPGA-based boards, including power architecture, configuration, and peripheral circuitry.
Develop schematics and oversee PCB layout for complex, high-speed multilayer boards.
Perform hardware simulations and signal analysis using tools such as LTspice and Cadence.
Design and validate high-speed interfaces including DDR4, USB3, Ethernet, MIPI, and Camera Link.
Define and manage PCB stack-ups, impedance control, differential pair routing, and high-speed layout constraints.
Conduct Signal Integrity (SI) and Power Integrity (PI) analysis to ensure performance, robustness, and reliability.
Lead prototype bring-up, testing, and debugging using lab equipment (oscilloscopes, logic analyzers, VNAs).
Collaborate with firmware, software, and mechanical teams to ensure full system integration.
Participate in design reviews, DFM/DFT processes, and continuous design improvements.
Support production and NPI activities, and resolve hardware-related manufacturing issues.

join our company outstanding team and contribute to our legacy of innovation in the senior product quality and reliability role! at our company , we are dedicated to pushing the boundaries of pioneering technology. the senior product quality and reliability engineer will provide leadership and management for the networking system product quality within the organization. establish, maintain, and optimize an effective quality management methods and target to achieve high quality performance.
as part of our team, you will work on networking system products and ensure their readiness for high-volume manufacturing. leading and mentoring root cause analysis for issues related to design, manufacturing or customers. enhance and improve products performance by proactive risk assessment and other prevention methods. this is an outstanding opportunity to be part of a company that is crafting the future of ai and computing.
 
what youll be doing:
own product quality and reliability performance of networking system products. providing leadership expertise in product performance and quality.
maintain and monitor product health thru structured routines and metrics, enable effective alert mechanism for early identification 
lead structured problem solving and risk assessment for quality issues originating from production and customer. ensure product readiness for hvm manufacturing and scale
responsible for customer quality issues and working within organization to resolve
lead critical processes for product performance e.g - crb, pcn ; non conforming material review - mrb
drive continues improvement initiatives in design, verification and validation processes, manufacturing quality throughout the entire product life cycle and improvement plan.

we are looking for a creative and independent TEST engineer with hands-on experience in digital TEST content development (atpg, lbist, mbist).our high-speed networking products are industry leaders, continually redefining speed, bandwidth, and reliability across generations.
in this role, you will be responsible for developing, validating, and supporting digital TEST content for our advanced network silicon ics (switches, nics, smartnics). you will work closely with dft, design, and TEST engineering teams to ensure high-quality and scalable TEST content from wafer to final product.
what you'll be doing:
develop atpg, lbist, and mbist content based on dft architecture
run validation flows (simulation/emulation/silicon), analyze failures, and debug pattern issues
collaborate with dft teams to ensure alignment between TEST logic and content implementation
support TEST program bring-up and pattern integration on production testers
continuously improve coverage, pattern quality, and pattern generation efficiency
work with product and TEST engineering to support yield improvement and debug activities

you will be developing physical design, sta, logic eq, power integrity flows and methodologies for implementation of networking chips and socs.
work closely with block owners, full chip sta engineers to assure high quality and timely convergence.
come up with unique and creative solutions to the state of the art physical design problems that are needed for our chips.
additional responsibilities include participating and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, ir-drop, em and back-end verification across multiple projects.

looking for a highly motivated Hardware Engineer to lead change impact analysis activities related to engineering design changes (ecos/ecrs) across our cutting-edge networking and computing platforms. this role is critical to ensuring that all product modifications are seamlessly evaluated for their impact on hardware, mechanical design, system performance, and TEST coverage across the product lifecycle. you will work closely with r&d, mechanical engineering, manufacturing, quality, and TEST teams to assess risks, define mitigations, and maintain excellence in product integrity and testability.
what youll be doing:
leading engineering change analysis (eco/ecr) processes across complex hardware systems.
evaluating the impact of component, layout, and mechanical changes on hardware functionality, manufacturability, and testability.
collaborating with cross-functional teams to ensure smooth implementation of changes without compromising product quality.
supporting dft (design for testability) requirements in the face of ongoing design changes.
reviewing bom and layout revisions and assessing ripple effects on power delivery, signal integrity, and thermal performance.
maintaining change traceability and documentation to meet engineering and compliance standards.
coordinating with manufacturing and operations teams to ensure product readiness and alignment with production timelines.

testing electro-optical and electrical chips and systems.
link-level performance characterization, verification, and debugging.
responsibility for complicated setups establishments, covering both optical and electrical components
characterizing optical and electrical performance using lab equipment and sw tools.
take an active part in silicon bring-up while managing e2e testing of the newest asics, with the objective of driving product to mass production with first-in-class performance.
characterizing products performance using lab equipment, such as oscilloscope, spectrum/network analyzer, pattern-generator, etc.
working in front of various TEST teams, with the responsibility of addressing issues and monitoring the TEST flows conducted by them

the manager will be leading various type of reliability testings of nvidia ics, and responsible on nvidia reliability labs, which is a multi-millions $ worth of equipment as well as activities such as iqc, oqc, ic inventory managing and shipments.
this will include ate (automated TEST equipment), systems & evaluation boards and reliability equipment.
full management a team of technicians and operators, including day to day management, prioritization, focal reviews, and training.
maintaining and operating laboratory equipment such as ic ate, htol systems, scopes, dvms and other tooling, minimizing down time for all.
providing excellent support to engineers and our internal customers, carrying out q&r tasks and following strict execution methodologies.
establishing/maintaining a comprehensive engineering lab stock, apply skills to automate complex tasks and improve team productivity and efficiency.
entering and maintaining a database of work procedures and TEST data and reading schematics of electronic circuits.
building, updating, and improving lab processes and procedures while following and ensuring strict safety procedures and safety checks.

architect end-to-end system validation strategies for new hardware platforms.
define TEST coverage and validation methodologies.
collaborate with hardware, software, qual and QA teams to align on product requirements and TEST coverage plans.
lead development of automation frameworks and diagnostics tools to enable scalable and repeatable testing.
analyze TEST data to identify root causes, guide debug efforts, and improve validation coverage.
provide technical leadership and mentorship across multidisciplinary teams and represent system TEST considerations in architecture and design reviews.