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6 ימים
Location: Yokne`am
Job Type: Full Time
you will be developing physical design, sta, logic eq, power integrity flows and methodologies for implementation of networking chips and socs.
work closely with block owners, full chip sta engineers to assure high quality and timely convergence.
come up with unique and creative solutions to the state of the art physical design problems that are needed for our chips.
additional responsibilities include participating and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, ir-drop, em and back-end verification across multiple projects.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering (or equivalent experience).
2+ years of fulltime relevant experience in the areas listed below.
proven experience and strong knowledge in key technical domains, including: physical design, backend cad (computer-aided design), sta (static timing analysis) and timing closure methodologies.
familiarity with industry-standard tools like primetime (sta) and primepower (power estimation).
self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.
strong sense of ownership, self-learning skills, and ability to work both independently and collaboratively with internal and global teams
ways to stand out from the crowd:
experience in signoff domains: sta (primetime), power estimation (primepower), power integrity (redhawk), formal eq. (formality)
knowledge in tcl/ PERL / Python
versatile
great teammate
This position is open to all candidates.
 
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7 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
our company is looking for best-in-class physical design cad engineer to join our outstanding networking silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
you will be in charge of developing physical design, synthesis, sta and logic eq methodologies for implementation of networking chips and socs.
work closely with block owners. full chip sta engineers and project managers to assure high quality and timely convergence.
come up with unique and creative solutions to the state of the art physical design problems that are needed for our chips.
additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, p&r, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering (or equivalent experience).
at least 2 years of relevant experience
proficiency using Python, PERL, tcl, make scripting.
expertise in analysing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.
knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ecos is required.
knowledge in process variation effect modelling and experience in design convergence taking into account variations.
successful track record of delivering designs to production is necessary.
self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.
ways to stand out from the crowd:
familiarity with synthesis, place and route, sta eda tools from synopsys (dc/fc/pt), cadence (innovus/tempus)
experience in methodology definition / flow owner of synthesis / place and route/ sta steps is an advantage.
great teammate.
ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8593784
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
Location: Yokne`am
Job Type: Full Time
looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part inflows development.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering or equivalent experience.
2+ years of experience.
proven experience in rtl2gds flows and methodologies. (advantage)
knowledge in physical design flows and methodologies (pnr, sta, physical verification). (advantage)
deep understanding of all aspects of physical construction and integration.
familiarity with physical design eda tools (such as synopsys, cadence, etc.).
great teammate.
nvidia has some of the most forward-thinking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? are you ready to become the engineer you always wanted to be? come and be part of the best physical design team in the industry!
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8593525
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
6 ימים
Location: Yokne`am
Job Type: Full Time
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering or equivalent work experience.
5+ years of experience in physical design.
proven experience in rtl2gds flows and methodologies.
knowledge in physical design flows and methodologies (pnr, sta, physical verification).
deep understanding of all aspects of physical construction and integration.
strong background of physical design verification methodology lvs/drc.
familiarity with physical design eda tools (such as synopsys, cadence, etc).
great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8594158
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
Location: Yokne`am
Job Type: Full Time
our company is at the forefront of ai-driven innovation in vlsi design automation. join us to shape the future of semiconductor design with cutting-edge ai tools and make a significant impact in a collaborative, high-performance environment. are you ready to push the boundaries of whats possible in vlsi cad? come be part of our pioneering team!
what you'll be doing:
you will be responsible for developing and integrating advanced cad solutions and automation flows using ai and Machine Learning for vlsi design, verification, and implementation.
work closely with design, verification, and cad teams to identify areas for improving vlsi workflows using advanced tools and methods.
research, prototype, and deploy ai-based algorithms.
develop and maintain scripts and automation infrastructure to enable seamless adoption of ai tools in the vlsi design process.
continuously review emerging ai technologies and methodologies to keep our cad environment up-to-date.
provide Technical Support and training to engineering teams on ai-enabled cad flows and best practices.
Requirements:
what we need to see:
b.sc./m.sc. in electrical engineering, computer engineering, Computer Science, or equivalent experience.
5+ years of experience in vlsi cad tool development, with a strong focus on integrating ai/ml techniques into eda workflows.
proficiency in Python and at least one ai/ml framework (such as tensorflow, pytorch, or scikit-learn).
hands-on experience with vlsi physical design and familiarity with industry-standard eda tools (e.g., synopsys, cadence).
knowledge of data preprocessing, feature engineering, and model deployment as applied to vlsi design challenges.
experience developing and maintaining automation scripts ( Python, PERL, tcl, make).
strong analytical skills in evaluating the impact of ai solutions on design quality, performance, and productivity.
excellent communication skills and the ability to work cross-functionally in a fast-paced environment.
self-motivation, attention to detail, and a track record of delivering robust solutions to production.
ways to stand out from the crowd:
demonstrated experience deploying ai/ml models in production vlsi cad environments.
contributions to open-source ai/eda projects or publications in relevant conferences/journals.
deep understanding of vlsi design challenges-such as timing closure, power optimization, or yield enhancement-and how ai can address them.
experience with cloud-based or distributed compute environments for large-scale ai training and inference.
strong ownership, curiosity, and a passion for continuous learning and innovation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8593742
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
our team in israel is looking for a dedicated chiplet sta owner to join us in defining the next era of ai's networking. this is an outstanding opportunity to work with innovative technology and collaborate with some of the most experienced minds in the industry. if you are ambitious, passionate about flawless design, and eager to make a lasting impact, this role is perfect for you!
what you'll be doing:
perform advanced static timing analysis (sta) at chiplet and fc level.
running prime time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
identify convergence risks and work closely with physical design, rtl and dft teams, ensuring convergence throughout various project stages.
responsible for a full timing closer and quality approval from pre-layout sta model through signoff.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering.
at least 5+ years of hands-on sta experience.
experience in prime time and signoff methodologies.
excellent leadership capabilities.
ways to stand out from the crowd:
knowledge in physical design flows and methodologies (synthesis, pnr, dft designs).
trong background of prime time tool.
great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8593621
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סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
we are looking for an experienced dft engineer to join an exceptional team of dft experts to develop the next generation dft technologies.
as a dft engineer at the networking group at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
what we need to see:
b.sc. in electrical engineering or computer engineering or equivalent experience.
10+ years of practical experience.
exposure to rtl implementation and coding.
familiarity with verification tools.
familiarity with backend flows.
strong debugging, problem solving and analytical skills.
strong communication and social skills are required.
ability to work in a geographically diverse team environment.
self motivated, independent and target oriented.
ways to stand out from the crowd:
prior design, verification experience.
experience in working with back-end on area, power and timing closures.
experience with cdc flows and tools.
experience with silicon testing.
cad tool development experience. 
our company has some of the most forward-thinking and hardworking people in the world working for us.
are you creative and autonomous?
do you love the challenge of developing the next generation technologies?
if so, we want to hear from you. come, join our dft team for a challenging and educational environment, where every individual has a significant contribution to our products and achievements!
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8593570
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דיווח על תוכן לא הולם או מפלה
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שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
Location: Yokne`am
Job Type: Full Time
our company is hiring a senior, hands-on engineer to lead technical innovation in our design verification (dv) automation infrastructure. this role requires a strong design/verification background combined with a proactive approach - identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. you will directly influence how verification is performed across our next-generation networking chips, enabling more scalable, efficient, and robust flows for complex asics powering the ai revolution. 
what you'll be doing:
lead the development of advanced verification automation tools, regression flows, and debug infrastructure.
identify key challenges and inefficiencies in current dv methodologies and proactively propose and implement improvements.
work closely with dv engineers, design teams, and tool developers to ensure solutions are practical and impactful.
balance innovation with hands-on engagement in daily dv issues - keeping a strong connection to real-world challenges and support needs.
act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for dv automation.
Requirements:
what we need to see:
b.sc. or m.sc. in electrical engineering or computer engineering (or related field).
5+ years of experience in design verification/chip design, with a deep understanding of simulation, testbenches, regression infrastructure, and debug.
proven ability to identify inefficiencies or recurring issues in dv workflows and develop automation scripts or tools to streamline processes and improve efficiency.
strong analytical thinking and problem-solving skills.
proficiency in Python and Linux.
excellent communication and collaboration skills - comfortable working across engineering teams. 
ways to stand out from the crowd:
experience with contemporary dv methodologies, such as intelligent TEST planning or advanced debug workflows (e.g., automated log parsing, waveform analysis, or triage tooling).
familiarity with recent industry trends in design verification, including ai-assisted debugging, smart triage, or llm-based tools.
proven ability to craft and deliver custom automation flows that scale to large regressions or complex simulation environments.
hands-on contribution to dv infrastructure development within cad/da teams or large SOC projects.
comfort working across teams, collecting feedback, and turning it into practical, adopted tooling. 
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8593664
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
6 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
we are looking for a creative and independent TEST engineer with hands-on experience in digital TEST content development (atpg, lbist, mbist).our high-speed networking products are industry leaders, continually redefining speed, bandwidth, and reliability across generations.
in this role, you will be responsible for developing, validating, and supporting digital TEST content for our advanced network silicon ics (switches, nics, smartnics). you will work closely with dft, design, and TEST engineering teams to ensure high-quality and scalable TEST content from wafer to final product.
what you'll be doing:
develop atpg, lbist, and mbist content based on dft architecture
run validation flows (simulation/emulation/silicon), analyze failures, and debug pattern issues
collaborate with dft teams to ensure alignment between TEST logic and content implementation
support TEST program bring-up and pattern integration on production testers
continuously improve coverage, pattern quality, and pattern generation efficiency
work with product and TEST engineering to support yield improvement and debug activities
Requirements:
what we need to see:
b.sc. in electrical engineering
strong understanding of scan, atpg, bist (mbist/lbist), and dft concepts
3 years of experience in digital TEST content development or related roles
scripting skills ( Python /tcl/ PERL ) - an advantage
strong analytical and debug skills, independent and detail-oriented
ways to stand out from the crowd:
familiarity with ate TEST environments (e.g., ultraflex)
experience with silicon validation and failure analysis
knowledge in sta, rtl simulation, or gate-level netlist analysis
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8594246
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
our company is looking for an asic design engineer to join the dft design team and develop the next generation dft technologies.
as a design engineer in the dft design team at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
what we need to see:
b.sc. in electrical engineering or computer engineering or equivalent experience.
1+ years of practical experience.
exposure to rtl implementation and coding.
familiarity with verification tools.
strong debugging, problem solving and analytical skills.
strong communication and social skills are required.
ability to work in a geographically diverse team environment.
self motivated, independent and target oriented.
ways to stand out from the crowd:
prior design or verification experience.
experience in developing sophisticated design blocks.
integration of design elements to large cluster or full-chip.
experience in working with back-end on area, power and timing closures.
scripting ability.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8593757
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
our company is looking for an experienced dft design engineer to join the dft design team and develop the next generation dft technologies.
as a design engineer in the dft design team at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
what we need to see:
b.sc. in electrical engineering or computer engineering or equivalent experience.
5+ years of practical experience.
exposure to rtl implementation and coding.
familiarity with verification tools.
strong debugging, problem solving and analytical skills.
strong communication and social skills are required.
ability to work in a geographically diverse team environment.
self motivated, independent and target oriented.
ways to stand out from the crowd:
prior design or verification experience.
experience in developing sophisticated design blocks.
integration of design elements to large cluster or full-chip.
experience in working with back-end on area, power and timing closures.
scripting ability.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8593721
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