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we are building the worlds fastest processor for Data Analytics we call it the Analytics Processing Unit (APU). Thanks to a revolutionary architecture based on years of academic research, we can accelerate analytic workloads by orders of magnitude, by offloading them from the CPU. We can achieve this without any code changes required from our customers.

Job Description
We are looking for a Senior Product Manager to drive the roadmap and priorities for products. This position will be based out main office in Netanya, Israel.

In this role, you will:
Meet with Data Engineers, VPs of Data Platforms, Data Architects, and Infrastructure Engineers within our customers and prospects to understand their use cases, pain points, and requirements
Research distributed data engineering use cases and heavyweight data analytics workloads across industry verticals, looking for workloads where our APU can deliver significant acceleration.
Understand the competitive landscape for acceleration options at a deep technical level.
Use this information to prioritize workload coverage in our acceleration platform.
Drive the roadmap for a performance profiling tool that helps customers predict the APUs speedup before they have the APU.
Collaborate with executive team on go-to-market strategy and drive product priorities to support that strategy.

We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASCs that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry.

Our networking architecture group is seeking for a highly skilled, leading engineer to explore, and define the Physical layer of our products. As a lead engineer, you'll be responsible to define and drive features and have responsibility on the Physical layer architecture. The role will include definition of both the hardware circuitry and the firmware/software that is involved in operating the physical layer communication, with emphasis on the former. We are searching for hardworking, enthusiastic, engineer which has both highly technical skills as well as good personal skills, in order to be able to lead cross groups activities.

What you will be doing:

Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for hardware architecture, system embedded software, user interface and high-level design.

Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles.

Define the architecture of implementing physical layer standards into our ASIC devices.

Involved in standard bodies activities and definition of next generation protocols.

Define features for the phy layer, to exploit interoperability between different generations of communication.

Be involved in product definition and the high-speed protocols that the company`s networking devices will support.

Work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. Provide architecture definitions and as a result converge on key design decisions.

Become focal point for our physical layer networking communication devices.

We are looking for an excellent Firmware Optics Verification Manager to join the Optical FW group. As the team manager, you will be leading a major development team responsible for the next-generation optical modules products while being hands-on with development activities. The verification team develops cutting-edge networking features for 1600GbE Data Centers and Networks of tomorrow . We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced. Are you ready for the challenge?


What you will be doing:

As a Optic Firmware Verification Manager, you will lead a group of firmware verification engineers, using your expertise in C++ and Python in an Agile methodology to drive the verification strategy.

Manage the verification process, aligning with quality standards and project timelines.

Drive and facilitate the planning, scheduling, and execution of the project and activities of the team

Collaborate with architecture and different software design teams as part of the software development lifecycle.

Work in pre and post-silicon development environments of next-generation our Optics modules products.

Gain a deep understanding of networking technology, system debugging and stacks, as well as the HW/FW/SW relationship.

Innovate! Bring our FW Optics products to shine in customers view

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are looking to hire a deeply technical, creative, and hands-on advanced-development researcher to prototype and evaluate novel networking technologies for our Ethernet datacenter solutions, focusing on distributed AI training, High-Performance Computing, Cloud, Storage, network programmability, end-to-end network software stacks, and SDN. We are a world leader in high-performance computing technology, AI, and networking with ambitious plans for future systems. This position offers the opportunity to have a real impact in a research-focused team in a dynamic company. The networking advanced-development group is chartered to research and incubate new technologies that will re-define the future data centers and supercomputer performance and functionality. Advanced development software researchers represent us in open-source projects, conferences, and standard bodies.

What you'll be doing:

Developing proof-of-concept implementations of new technologies, and thereafter guiding their incorporation in company products.

Evaluation and analyzing new technologies at scale.

Optimizing collective communications and distributed AI training, and HPC communications. Improving performance on our supercomputers, researching distributed solutions for next-gen data centers networking.

Software development and architecture, ranging from application behavioral analysis and algorithms, network simulations, middleware, and API design, down to implementing OS subsystems, device drivers, FW, and HW modeling.

Customer engagements, academic research collaborations, publishing white papers, blogs, RFCs, and conference lectures/BOFs.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team in our coompany, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

This is a highly visible position in CSG (Switching Group). We are looking for DFT engineer that wants to be part of the best implementation team, that performs a true RTL to production.
The DFT position involves ownership of testability, methodology and execution for assigned projects. The DFT engineer is responsible from RTL DFT insertion to final test program bring-up. The DFT engineers are implementing Boundary scan, MBIST, SCAN and SCAN compression, and more. They are generating all patterns and work on the chips final test programs.

We are looking for a C++ Team Leader.
Your Impact:
Owning features from design and development to production.
Implement cross-platform solutions while effectively utilizing the capabilities of each platform.
Perform code run time and memory footprint optimizations on various platforms.
Manage your team members and collaborate with colleagues in solving complex problems and overcoming design challenges.

We are looking for a talented C++ engineer to join our Tel Aviv R&D center.
If you want to have a key role in the development of a cross platform, High availability & high performance-oriented fintech product, Come join us.
Your Impact:
Owning features from design and development to production.
Implement cross-platform solutions while effectively utilizing the capabilities of each platform.
Perform code run time and memory footprint optimizations on various platforms.
Collaborate with team members and colleagues in solving complex problems and overcoming design challenges.

We are looking for a talented C++ engineer to join our Tel Aviv R&D center.
If you want to have a key role in the development of a cross platform, High availability & high performance-oriented fintech product, Come join us.
Your Impact:
Owning features from design and development to production.
Implement cross-platform solutions while effectively utilizing the capabilities of each platform.
Perform code run time and memory footprint optimizations on various platforms.
Collaborate with team members and colleagues in solving complex problems and overcoming design challenges.

Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world. As part of our Web Services, we are looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.

Looking for exceptional senior engineers to join the top-tier team that is developing the next generation semiconductor platform, based on a revolutionary architecture. Engineers will participate in design and verification activities, working on the next generation of our products.

You are invited to take part in developing, integrating and deploying cutting-edge technologies, starting with identification and definition of project requirements, architecture, feature development, and collaboration with the different groups.
Your design will be integrated into the nitro SoC, on millions of servers worldwide. This is an opportunity to have a large-scale impact.
As a VLSI engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities:
*Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.

A dynamic fast-paced start-up company, transforming the way reliability of electronics is achieved. In a world where machines are gaining immense responsibility over our lives, sudden failure is not an option.
We have developed a cloud-based platform, which combines data created in chip-embedded Agents (IPs), with machine learning, to predict faults before they become failures. Our solutions provide unprecedented insights throughout the value chain, from Chip Vendors to System Vendors and Digital Service Providers.
The company was founded by seasoned industry veterans, including three former founders of Mellanox Technologies, with deep knowledge and experience in the electronics industry and is backed by worldwide leading investors.

we combine different disciplines to create a revolutionary solution. Our team is highly interdisciplinary, ranging from SaaS and Machine Learning experts, to top designers in Chips and Circuits, as well as masters of EDA. We work together and learn from each other.

We are looking for a Data Analytics Engineer who is results oriented, have strong analytical skills, attention to details and would like to be a part of building exciting company.
Responsibilities
Analyse pre/post-silicon data and develop algorithms for our proprietary big data analytics platform for ICs and application level. Interact with customers on integration and problem-solving
Working with customers on solution integration pre/post-silicon
Performing data analysis and providing insights on data extracted from pre/post-silicon stages
Working with the R&D teams to implement algorithms in the analytics platform
Working with IC design groups to characterize and enhance circuit performance
Supporting customers with analytics platform problems solving and new features introduction

At UVeye, we're on a mission to redefine vehicle safety and reliability on a global scale. Founded in 2016, we have pioneered the world's first fully automated suite of vehicle inspection systems. At the heart of this innovation lies our advanced AI-driven technology, representing the pinnacle of machine learning, GenAI, and computer vision within the automotive sector. With over $200M in funding and strategic partnerships with industry giants such as Amazon, General Motors, Volvo, and CarMax, UVeye stands at the forefront of automotive technological advancement. Our growing global team of over 200 employees is committed to creating a workplace that celebrates diversity and encourages teamwork. Our drive for innovation and pursuit of excellence are deeply embedded in our vibrant company culture, ensuring that each individual's efforts are recognized and valued as we unite to build a safer automotive world.
We are hiring a highly skilled and motivated Generative AI Researcher to join our talented research team. As a Generative AI Researcher, you will be responsible for developing and implementing cutting-edge multi-modality LLMs to solve complex problems and drive innovation across our organization. You will work closely with data scientists, software engineers, and product managers to design, build, and deploy genAI-powered solutions that enhance our products and services.
A day in the life and how you’ll make an impact: Designing, developing, and implementing multi-modality generative AI models and algorithms utilizing state-of-the-art techniques
* Collaborating with cross-functional teams to define genAI project requirements and objectives, ensuring alignment with overall business goals.
* Stay up-to-date with the latest advancements in generative AI, machine learning, and deep learning techniques and identify opportunities to integrate them into our products and services.
* Publish in high profile venues such as Nature, Science, CVPR, NeurIPS, ICML or similar
* Optimizing existing generative AI models for improved performance, scalability, and efficiency.
* Developing and maintaining AI pipelines, including data preprocessing, feature extraction, model training, and evaluation.
* Developing clear and concise documentation, including technical specifications, user guides, and presentations, to communicate complex AI concepts to both technical and non-technical stakeholders.
* Contributing to the establishment of best practices and standards for generative AI development within the organization
* Providing technical mentorship and guidance to junior team members

We are looking to hire a talented VLSI Physical Design engineer to join our VLSI group in Tel Aviv.
You will work alongside other talented engineers to develop our cutting-edge AI chips.
As part of our team you will be involved in all phases of physical design activities and you will take part in developing our special BE flows that enable us to tape out our technology-leading chips.
Responsibilities:
As part of our team, you will be involved in all phases of physical design activities, and you will take part in developing our special BE flows.