דרושים » הנדסה » Senior Verification engineer

As a Senior RTL Verification Engineer, you will lead the verification of complex subsystems and architectural features within a next-generation, high-performance RISC‑V Application Processor. You will work closely with architecture, design, modeling, software, validation, and implementation teams to ensure first-pass silicon success while meeting aggressive performance, power, and area (PPA) targets.

In this role, you will drive verification strategy, methodology, and execution from specification through tape-out, providing technical leadership in the definition of scalable verification environments, coverage closure plans, and debug methodologies. You will be expected to independently own large verification domains, influence design and architecture decisions, and mentor junior engineers.

The ideal candidate has extensive experience in CPU or SoC verification, with strong expertise in one or more of the following areas: RISC‑V architecture, CPU microarchitecture, MMU, memory hierarchy, cache coherence, interconnects, and micro-controller verification.

Responsibilities

Lead verification efforts for complex CPU and SoC subsystems from architecture definition through tape-out.

Define comprehensive verification strategies, test plans, coverage models, and closure criteria.

Architect, develop, and maintain advanced UVM-based verification environments and reusable verification components.

Drive verification execution, including stimulus development, functional coverage closure, assertions, regressions, and debug.

Collaborate closely with architecture and design teams to review specifications, identify ambiguities, and ensure verifiability.

Develop constrained-random, directed, and scenario-based tests to validate functional correctness and corner cases.

Drive root-cause analysis and resolution of complex design and verification issues.

Define and implement verification methodologies that improve scalability, quality, and productivity across the project.

Work with software, modeling, performance, and validation teams to develop system-level verification solutions.

Analyze verification metrics and risks, proactively driving closure plans to achieve project milestones.

Mentor junior verification engineers and contribute to the technical growth of the team.

Contribute to DV methodology discussions and influence verification best practices across the organization.

We are seeking a motivated FPGA Engineer with up to 3 years of experience to join our hardware development team. In this role, you will contribute to the design, implementation, verification, and debugging of FPGA-based solutions for advanced digital systems. You will collaborate with architects, ASIC/SoC designers, firmware engineers, and verification teams to develop high-performance products from concept through deployment.

This position offers an excellent opportunity to gain hands-on experience with modern FPGA technologies, digital design methodologies, and complex microcontrollers in a collaborative engineering environment.

Key Responsibilities
Design and implement FPGA logic using Verilog and SystemVerilog.

Develop and maintain FPGA subsystems, IP blocks, and reference designs.

Participate in FPGA architecture discussions and design reviews.

Perform RTL simulation, debugging, and functional verification.

Support synthesis, place-and-route, timing closure, and implementation activities.

Develop and execute test plans for FPGA validation and bring-up.

Debug hardware and system-level issues in laboratory environments.

Integrate interfaces such as JTAG, AHB, DDR, etc.

Collaborate with software, firmware, and hardware teams throughout product development.

Document designs, verification results, and development procedures.

Support prototype development and system integration activities.

We are seeking a seasoned Sr Staff Physical Design Engineer to provide technical leadership across full-chip and multi-die physical implementation on advanced TSMC FinFET nodes. You will define and own the backend design methodology, champion Agentic AI integration into the PD flow, and mentor engineers across the team while interfacing directly with foundry, EDA vendors, and executive stakeholders.

What You'll Do
Architect and own the full-chip physical design strategy: floorplanning, power delivery network (PDN), clock architecture, PnR, and timing closure
Define and drive backend methodology standards across the team for advanced node tapeouts (N5/N4P/N3)
Lead critical timing closure efforts - MCMM, OCV, advanced ECO strategies, and cross-corner sign-off
Oversee and guide signal integrity, power integrity, EM/IR, and reliability analysis for full-chip designs
Architect and lead the development of scalable PD flow infrastructure using Python and TCL - including automated regression, sign-off reporting, and run management systems
Champion the adoption of Agentic AI in the design flow - define use cases, evaluate tools, prototype autonomous agents for floorplan exploration, timing closure, and ECO automation
Lead cross-functional design reviews with DFT, verification, analog, and process engineering teams
Interface with TSMC, EDA vendors (Synopsys, Cadence, Siemens), and internal research teams to evaluate and adopt new methodologies
Mentor and technically guide junior and mid-level PD engineers across the organization

you will define system and IP architectures, develop architectural models, and author technical specifications for a variety of high-performance, high-quality, low-power, world-class products.

You will

Define and drive architectures across multiple domains, spanning chip-level components, subsystems, and system-level workflows.

Translate product requirements into architectural specifications, features, and hardware/software execution models for implementation teams.

Lead cross-functional technical decisions, balancing functionality, performance, scalability, power, and implementation trade-offs.

we are seeking a Hardware Systems Engineering Manager to join an advanced technological environment focused on computing hardware and shelter-based Command & Control (C2) systems.
This position serves as the Deputy to the Hardware Department Manager and involves supporting and leading projects in the field of electro-mechanical systems engineering, including technical specification development, system architecture definition, end-to-end project management, team leadership, customer engagement, supplier management, and hands-on technical involvement.
Resposibilities:
Support the management of multidisciplinary projects throughout the entire project lifecycle.
Participate in the definition of system architectures and hardware platform design for C2 systems.
Develop technical specifications and define system requirements.
Work closely with suppliers and manufacturers, including participation in technical design reviews (PDR, CDR, etc.).
Support development, testing, and system integration activities.
Assist in managing interfaces with customers and internal stakeholders.
Lead and drive technical and operational activities across multiple disciplines.

The Project Manager - Global Lumina Scanner Engineering Department is accountable for leading, coordinating, and executing cross‑functional engineering projects across the full product lifecycle, including NPI, sustaining engineering, production support, test infrastructure, and continuous improvement.
The role ensures alignment between Engineering, Operations, R&D, Quality, and Supply Chain, enabling predictable execution, clear ownership, and end‑to‑end visibility of all engineering initiatives.

Key Responsibilities
Lead and manage multiple engineering projects in parallel across NPI, sustaining, test, electronics, and system engineering.
Build and maintain integrated project plans, milestones, dependencies, and critical paths.
Drive execution through all project phases - definition, planning, execution, validation, and closure.
Coordinate design transfer, manufacturing readiness, validations, and GA milestones.
Own project governance: status reviews, KPIs, risk management, escalation, and decision tracking.
Drive cross‑functional alignment between R&D, Manufacturing, Test, Quality, Supply Chain, IT, and Program Management.
Manage ECO‑driven projects and ensure full impact analysis, execution, and closure.
Support supplier‑related projects including readiness, FAIs, tooling, and ramp‑up activities.
Establish clear ownership, priorities, and communication cadence across all stakeholders.
Provide consolidated, real‑time visibility of project status to management.

We are seeking a dynamic Field Service Engineer to join our team at our company, playing a critical role in advancing our renewable energy solutions. As a Field Service Engineer, you will contribute significantly to the future of various renewable energy products and solutions, serving as an interface between our customers and our company.

Ideal Candidate:
The ideal candidate will have a background as a practical Electrical Engineer or Electrical Engineer with a valid electrical license and comprehensive understanding of AC/DC, Low/Medium Voltage systems, networking and system controls. Proficiency in both Hebrew and English languages at a minimum of C1 level is required. The role will require on-call duty and the ability to oversee critical customer situations. Experience with Battery Storage solutions is highly beneficial, and a valid driving license is essential due to frequent travel requirements.

Responsibilities:
Serve as the primary interface between customers and our company, taking ownership of dispatched customer issues across various renewable energy solutions.
Provide comprehensive service and customer support during field visits or dispatches, running diagnosis on errors or technical problems.
Deliver on-site installation, repair, maintenance, testing tasks, upgrades, or rework activities for diverse renewable energy products.
Provide remote support to clients as needed.
Leading projects during commissioning and site acceptance services for various renewable energy solutions.
Adhere to operational procedures, processes, and practices consistently, ensuring compliance.
Follow applicable health and safety instructions and regulations for various renewable energy installations and services.
Maintain updated documentation, work instructions, and processes for existing and upcoming service contracts and agreements, including reports creation.

The position is responsible for the technical leadership as well as the team management of ATE test station development and automation SW infrastructure, from system architecture, test strategy, down to production. We are seeking a highly experienced professional with a strong background in RF, digital, and system-level testing, and with the ability to guide technical decisions, and mentor engineers on ATE methodologies, operation, and maintenance.


Team Responsibility
Design and develop Automated Test Equipment (ATE) for RF, digital, and mixed-signal products at board and system levels.
Technical definition and implementation of test strategies in collaboration with R&D, product engineering, and manufacturing teams.
ATE integration with software and firmware control as well as with automation systems.