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We are looking for a Mechanical Design Engineer to join our mechanical engineering department as a key player in the development of next-generation high-performance interconnects optical solutions for data center servers and storage systems. This key position includes leading the product design throughout all lifecycle stages from inception to Mass production, close interaction with HW, PMC (Product management & configuration), NPI, Thermal, Layout, Quality, and Supply chain teams.


What youll be doing:

Drive all the mechanical design aspects of optical transceivers, including PCB design, opto-mechanical chain and mechanical envelope.

Independently lead product design from concept, through detailed design, and support it during Qualification, NPI and MP stages.

Collaborate in research of ground-breaking technologies, materials, and processes with other groups to bring in creative ideas that solve ever-growing needs.

We are seeking a highly skilled and versatile Performance Research and Analysis Manager to join our Performance Group. This role will drive end-to-end performance strategy and execution for our next-generation data centers and solutions based on GPU systems, NIC, Switch, DPU and Networking technologies. The ideal candidate will oversee, evaluating, and optimizing end-to-end AI GPU cluster-level performance for scaling out large scale distributed training and inference jobs communication. The role will focus heavily on RDMA, Networking Protocols, Collective Communication, Congestion Control, and Load Balancing algorithms. Secondarily, you will lead our DPUs and Storage technologies for N-S use cases to support AI Inference jobs. Third, you will drive our Performance Dashboards and Observability for cluster-level performance analysis from a stream line telemetry across NICs, Switches, GPUs, and NVlink.

What you'll be doing:

Drive end-to-end performance strategy, characterization, test plans, and optimization for our next-generation AI GPU clusters, focusing on large-scale distributed training and inference workloads.

Deeply evaluate and optimize our Networking core technologies performance, including RDMA/PRDMA, networking protocols, collective communication (NCCL), congestion control, and load-balancing algorithms.

Work on performance research and analysis of our DPUs and storage technologies in North-South (N-S) use cases and deployment scenarios to maximize performance and efficiency for AI inference jobs.

Drive the strategy for performance observability and dashboards across our next-generation data center solutions and supercomputers by leveraging scalable, streamlined telemetry pipelines to build performance dashboards and automated analytics based on real-time performance metrics across NICs, Switches, GPUs, and NVLink boundaries.

Perform deep root-cause analysis (RCA) on complex multi-node performance bottlenecks, driving actionable mitigation plans across hardware, firmware, and software teams.

We are looking for a talented Senior Software infrastructure and tools Engineer to join the Data Processing Unit (DPU) SW Group. As a part of the team, you will lead complicated integrations which combining new technologies, automating processes, bringing up full software stacks, developing system scripts for cutting edge networking technologies with the quality requirements of industry-leading customers. You will work closely with our SDK development and gain an understanding of our products and technologies.

What youll be doing:

Crafting efficiency and usability improvements across our proprietary products that will help streamline various release pipelines and processes across us.

Definition and development of SDKs to be used for DPU SW development.

POC of new technologies that require additional development/integration efforts.

Creating and maintaining build system for complex SW products.

Developing tools using our various proprietary and other cutting-edge technologies.

Collaborate with team members, Architects, design, QA teams, and verification.

Our Analog Layout design team is looking for a Senior Analog Layout Design Engineer - someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed mixed-signal circuit designs. We have continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence.

What you'll be doing:

Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools.

You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

Job duties will include floor planning, custom layout and verifying against design rules and schematics, EM/IR analysis.

We are seeking an NPI Engineering Build Manager who is passionate about working on products that enable deep learning. Our team manages the NPI networking supply chain for engineering activities. Activities start from very early engagement with design engineering team and follow through all quick turn NPI builds at the shortest possible cycle time. Our team supports all these engineering quick turn activities by engaging with the engineering team, material suppliers, Operations team, and the PCB manufacturing team. All the parties need to be kept aligned while engineering keeps changing either the material sets or the process.


We are looking for someone can work in a dynamic and fast-changing environment. You are someone who enjoys working on groundbreaking technology and enjoy working with people to take on problems. As a Build Project Manager, you are able to see both the high-level view and be proficient in tracking and following up on detail whether it is an existing product that requires new qualifications or a ground up new product. We will expect you to understand technical detail and be able to translate that into program impact.


What you'll be doing:
Build project's production plan per product's lifecycle, and execute it with NV manufacturers
Communicate with other team members and suppliers to get project details.
Flexibility to adapt to changing requirements, diverse project needs, and tight timelines.
Ability to report on program details in Alignment meetings.
Track and communicate key deliverables, constraints, risks, dependencies and clearly identify critical paths while working with ASIC, product, test, software, board, system engineering and planning teams and other program managers towards a common goal.
Manage cross-functional communications independently, work within a matrixed and publish progress/roadblocks and highlight risks to upper management.
Bring diverse and globally distributed teams together to tackle complex problems and work towards closure.
Lead and attend cross-functional NPI meetings related to your product and highlight key Ops issues while ensuring that the product is ready for production.
Be an active participant in the NPI team by recommending methodology improvements that we can practice as a team.

Networking unit has continuously reinvented itself over two decades. Our high-speed products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. Today, we are increasingly known as the place for getting End-to-End High-Speed Ethernet and InfiniBand Solutions. We're looking to grow our company and build our teams with smart people who can join us at the forefront of technological advancement. Our IC Packaging design team is looking for a Senior IC Packaging Design Engineer to join our package team. and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for our products.

What you'll be doing:

As part of a IC Packaging design team, you will collaborate to implement high speed and PDN design for ASIC packages.

Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using Cadence APD (Allegro) or SiP tools.

Optimize package pin out incorporating system level trade-offs of pins assignment.

Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations.

In close co-operation with the SI/PI/HW design teams and product teams.

Planning, ensuring stakeholder management and leading projects from start to finish.

We are looking for a talented AI Solutions Engineer to join our innovative AI team. The team develops advanced AI platforms and applications including agentic workflows, Retrieval-Augmented Generation (RAG) systems, Large Language Model (LLM) based solutions, AI agents, MCPs, and more. You will have the opportunity to shape how AI transforms our products and internal processes worldwide. Your responsibilities will include implementing state-of-the-art AI technologies, developing all aspects of the project - AI, code, data preparation, evaluation, and deployment. We are looking for a motivated teammate who thrives on solving complex problems with AI and continuously explores emerging techniques in this rapidly evolving field.

What you'll be doing:

Design and implement Agentic platforms and workflows to simplify the agentic experience across the company.

End-to-end solutions Implementation to increase the organization quality and productivity.

Develop AI solutions that integrate seamlessly with existing products and workflows.

Build evaluation frameworks to measure and improve AI system performance.

Collaborate with cross-functional teams to identify and implement AI opportunities.

Collect and prepare data from multiple large scale sources for AI training and inference.

Our networking is a world-leader in building the most powerful supercomputers in the world which drive the AI and HPC industry. These rely on high performant network ASICs which connect GPUs at scale for efficient data transfer and compute. We are looking for a hardware performance modeling architect to join our team and build a network simulator used for the design, optimization and exploration of our future networking chips. The role is cross-disciplinary, collaborating with hardware and software teams across the wider company. You will solve complex problems, develop innovative solutions and be instrumental in determining the architecture of our next generation networking solutions.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

Develop cycle-accurate simulation components to evaluate and analyze micro-architecture and architectural options.

Explore innovative ideas to improve and optimize our chip systems performance.

Serve as a focal point within the organization and distribute the knowledge that you acquire.