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Location: Industrial Plant & Customer Sites JB- Role Objective To lead, manage, and oversee team activities within the production lines or departments. The role ensures full alignment with work plans, product quality standards, and strict timelines, while maintaining an uncompromising commitment to safety protocols. The Foreman serves as the critical link between plant management and frontline personnel.
Key Responsibilities Output & Target Management: Responsible for meeting daily and weekly production targets (KPIs), monitoring Overall Equipment Effectiveness (OEE), and minimizing waste/scrap. Team Leadership & Motivation: Direct management of Team Leaders, including scheduling, attendance oversight, and addressing disciplinary and employee welfare issues. Quality Control: Ensuring execution adheres strictly to Work Orders, performing in-process inspections, and preventing quality deviations. Health, Safety & Environment (HSE): Implementing and enforcing rigorous safety regulations, identifying workplace hazards, and reporting "near-miss" incidents. Continuous Improvement: Identifying operational bottlenecks and streamlining production processes. Onboarding & Training: Managing the integration of new hires, providing professional technical training, and ensuring organizational knowledge retention.

DRS RADA is a global pioneer of radar systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance . We are looking for an experienced Repair Lab Manager with a strong background in managing repair operations for military electronic products in both RMA/field-return and serial production environments. Key Responsibilities:
* Manage repair lab operations for military electronic products, including both RMA returns and serial production repairs.
* Lead and supervise teams of repair engineers, assemblers, and soldering technicians.
* Oversee troubleshooting, fault isolation, repair, rework, and verification activities for electronic boards, modules, and systems.
* Ensure efficient handling of returned units, production failures, and ongoing repair priorities.
* Coordinate closely with Engineering, Manufacturing, Quality, Supply Chain, and related functions.
* Monitor repair performance, turnaround time, yield, and quality metrics.
* Support root cause analysis and implementation of corrective and preventive actions.
* Ensure compliance with internal procedures, quality standards, workmanship requirements, and traceability needs.
* Drive continuous improvement in repair processes, workflow, and lab efficiency.
* Maintain a safe, organized, and technically capable repair environment.

You will be part of our company's REM department. our companys Road Experience Management (REM) is an end-to-end mapping and localization engine which is used for full autonomy capabilities and services.
Generating validation process and methodologies for such a technology giant is challenging, sufficient & enriching work.
Since we are dealing with a complex system based on machine learning and image processing, the analysis and validation processes require deep thinking as well as advanced technical and analytic abilities.
You will be responsible for defining and developing validation infrastructure, tools and methods using cutting edge technology and cloud-based application.
What will your job look like?
Participate in planning and implementation of advanced validation Processes
Define and implement end-to-end validation tools and methods with advanced geometric calculations, logics, and heuristic
Integrating new features into existing Validation Processes
Improving sensitivity, efficiency, effectiveness, and quality of validation processes
Management and prioritization of daily tasks
Integration of tools and algorithms from different departments in the company and applying them into our validation infrastructure.

The company EyeC VLSI team designs cutting-edge chips for RADAR systems used in ADAS and autonomous vehicles and is looking for an experienced DFT Engineer.
This is a unique opportunity to join a team of top-tier engineers working with the most advanced technologies to develop Autonomous Vehicle (AV) SoCs. Every engineer in our team plays a broad and diverse role, taking on significant responsibilities, being involved in critical development stages, and making a direct impact on the success of our projects.
What will your job look like:
You'll be responsible for the architecture of DFT solutions across the SOC (MBIST, SCAN, ATPG, LBIST and more).
Develop all the necessary RTL for the different modules.
Verify and Validate your design in GLS.
Develop ATPG to the highest requirements of Functional Safety (ISO26262).
Debug and analyze coverage and yield loss.
Support production activities and Si debug.

As a Silicon Engineering Manager you will be responsible for improving silicon-photonics yield and performance through data-driven analysis, cross-functional collaboration and proactive issue resolution.

You will serve as the key interface between R&D, Process and Production teams, ensuring efficient data flow, rapid issue identification and continuous process improvement across wafer fabrication, device testing, and packaging stages.

Responsibilities
Perform silicon process and chip-level data analysis, establishing correlation between chip and wafer performance.
Lead process debug and yield loss analysis at chip/wafer level, driving root cause investigations and corrective actions.
Manage engineering approval forum to release production material.
Collaborate closely with vendors to implement new product tests and resolve technical/process issues.
Act as a key interface between design, testing, and production teams, ensuring alignment across the product lifecycle
Oversee and coordinate the transfer of data related to silicon design, testing, fabrication, and characterization between Production and R&D departments.
Develop and implement data management strategies to ensure data accuracy, security, and accessibility.
Maintain proper documentation of data transfer protocols, version control, and data integrity checks.
Support data analysis efforts to improve silicon performance, yield, and quality.
Ensure compliance with company policies and industry standards related to data security and confidentiality.

We are looking for a Photonics Layout Engineer to join our integrated photonics design team.

This position is also well-suited for Analog Layout Engineers who are interested in transitioning into photonic integrated circuit (PIC) design.

In this role, you will be responsible for creating, optimizing and validating PIC layouts, ensuring manufacturability, performance and compliance with foundry design rules.

You will work closely with device designers, process engineers and tape-out teams to deliver high-quality layouts of silicon photonics PICs.

Strong candidates will have hands-on experience with industry-standard layout tools, especially Cadence Virtuoso or similar software.

Understanding of photonic components, waveguide routing and automated layout generation is a major advantage.

You will also contribute to layout methodologies, PCells, and design automation flows to accelerate PIC development.

Responsibilities

Develop and implement mask layouts for photonic integrated circuits using Cadence Virtuoso or similar software.

Create and maintain PCells for photonic building blocks (waveguides, couplers, modulators, gratings, etc.).

Perform waveguide routing, ensuring correct connectivity, bend radius limits, and low-loss optical paths.

Verify layouts using DRC, and LVS to ensure compliance with foundry requirements.

Collaborate with device designers to translate basic schematics and specifications into Software schematics and manufacturable layouts.

Optimize layouts for performance, yield, and compactness while adhering to technology constraints.

Participate in photonic design automation tool development and workflow improvements.

Prepare and manage data for tape-out and support mask review processes.

Debug layout and rule-check issues and propose corrective actions.

We are seeking a hands-on Program Manager (PMO) to lead complex customer programs in a fast-growing, multidisciplinary deep-tech environment.

This role drives execution across customers, R&D and operations teams, owning programs from early design engagement through data centres qualification and production ramp - directly enabling customer adoption, predictable delivery, and revenue growth.

Responsibilities
Own end-to-end execution of customer programs - from design-in through DC qualification and production ramp.
Drive on-time delivery of milestones and customer commitments in complex technical environments.
Act as the execution focal point between customers, R&D and operations teams.
Build and scale multi-customer execution frameworks that support company growth.
Proactively identify risks, remove blockers, and minimize escalations across programs.
Ensure high-quality delivery while protecting engineering focus.

The SW validation team plays a key role in enabling the next generation of autonomous driving technologies. In their primarily Python-based development environment, they are responsible for developing and maintaining test content for the autonomous vehicle brain, supporting complex end-to-end validation flows across the system.
As part of the full autonomous driving pipeline, they work closely with cutting-edge technologies and gain direct exposure to the real-world impact of their work - helping bring some of our companys most advanced autonomous driving capabilities from development into reality.
What will your job look like:
Be the technical lead of the team that is responsible for the development of test content (mostly in Python) for the autonomous vehicle system and E2E flows
Review and approve system architecture requirements
Design and implement complex test solutions
Enforce compliance with autonomous vehicle industry standards.