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We are seeking a Senior Networking Software Engineer to join our RDMA Transport Software team, driving the development of next-generation RDMA solutions for AI, cloud, HPC, and storage. You will research and develop innovative transport algorithms that push the limits of performance and scalability. You will work in a fast-paced, collaborative environment alongside talented engineers from around the world, supporting the data needs of the worlds largest enterprises

What you'll be doing:

Take part in research, design, and development of advanced RDMA transport mechanisms and algorithms, enhancing performance, reliability, and scalability.

Collaborate closely with hardware engineers, software developers, and system architects to align on project objectives and requirements.

Keep up with industry trends and emerging technologies, integrating new ideas and innovations into the development process.

We are seeking to hire an excellent Firmware Engineer to join the GPU networking (NVLink) FW group in Tel-Aviv / Raanana. You will have the opportunity to take part in designing, implementing, and driving major development firmware features, delivering the next-generation GPU networking products.

We drive the data growth of the worlds biggest companies. With dedicated engineers around the globe, the work environment is dynamic, exciting, and fast-paced. Are you ready for the challenge?

What you will be doing:

Design and implement new features in the core of our GPU firmware.

Collaborate with architecture and different software design teams throughout the software development lifecycle.

Work in Pre & Post-silicon development environments of next-generation GPU products.

Gain a deep understanding of system debugging, networking technology, and stacks, as well as the HW/FW/SW relationship.

Innovate! Bring our FW switching products to shine in customers view.

Collaborate with other R&D teams around the globe.

We are looking for a Senior Project Manager to join the Israeli Networking Cluster Solutions group. The project manager will be responsible for the definition, planning and execution of multidisciplinary projects for building our clusters in Israel. Direct communication with Architecture, R&D, Operations, Finance, IT, Security, and all relevant stakeholders within and outside of us. Accountable and responsible for the success of the relevant Cluster build programs.

What youll be doing:

Own entire activities associated with planning and executing projects for building large Clusters for us in Israel.

Co-work with our teams on different disciplines associated with building large scale clusters Data-Center Engineering, Data-Center Operations, Corporate-IT, Planning, Finance and more.

Manage periodic sync meetings within us and with external stakeholders to track and monitor projects meetings.

Present project status to our senior executive team.

Matrix management of internal teams and resources for successful execution of projects and activities.

We are looking for a Test Development Engineer to join our team. This role will work as part of a team driven by the development of NVIDIA's networking and interconnect products. Do you have a passion for automation development, test program development, code writing and looking for sophisticated and significant topics? We will be happy to have your skills on the team. You will handle various projects across teams, build test plans, automate test specification and execution. You will continuously innovate and develop scalable, reliable, high-performance systems and tools to enable the next generation of Interconnect products.

What Youll Be Doing:

Will work on projects across multiple functional teams from different geographies throughout the product lifecycle

Develop test plans, and execute testing via automation and manually for all supported hardware releases

Work with cross-functional teams across engineering, thermal, mechanical, and HW to identify test requirements

Develop automation and tools for NVIDIA hardware releases and test environment

Debug HW & SW failures in interconnect products, Isolate the problem, and get to the root cause

Design and build technical processes to address business issues

Deploy the test solution to the production sites and provide support if needed.

Train personnel on the required processes and operations of complex test systems.

Ensure all testing is being conducted in compliance with all safety protocols.

We are at the forefront of AI-driven innovation in VLSI design automation. Join us to shape the future of semiconductor design with cutting-edge AI tools and make a significant impact in a collaborative, high-performance environment. Are you ready to push the boundaries of whats possible in VLSI CAD? Come be part of our pioneering team!

What you'll be doing:
You will be responsible for developing and integrating advanced CAD solutions and automation flows using AI and machine learning for VLSI design, verification, and implementation.
Work closely with design, verification, and CAD teams to identify areas for improving VLSI workflows using advanced tools and methods.
Research, prototype, and deploy AI-based algorithms.
Develop and maintain scripts and automation infrastructure to enable seamless adoption of AI tools in the VLSI design process.
Continuously review emerging AI technologies and methodologies to keep our CAD environment up-to-date.
Provide technical support and training to engineering teams on AI-enabled CAD flows and best practices.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.

We have been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people.

Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an NVIDIAN, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

At NVIDIA Networking, we are driven by innovation and excellence. Our team in Israel is looking for a dedicated Chiplet Layout owner to join us in defining the next era of AI's networking. This is an outstanding opportunity to work with innovative technology and collaborate with some of the most experienced minds in the industry. If you are ambitious, passionate about flawless design, and eager to make a lasting impact, this role is perfect for you!

What you'll be doing:
Be part of a cross-business-unit team and own the high-speed IP integration.

Build a Chiplet floorplan layout design from early assembly/planning through implementation and signoff.

Work closely with partition owners and Full Chip STA engineers to assure high quality and timely convergence.

Define and implement efficient, high-quality Full Chip/Chiplet physical design tools, flows, and methodologies.

Gain hands-on experience implementing the partition-level BE design (RTL2GDS).

We are seeking a highly motivated and experienced System Test Architect to define, develop, and drive comprehensive validation strategies for next-generation hardware platforms. As a key member of our hardware architecture and systems engineering team, you will be responsible for ensuring the robustness, performance, and scalability of NVIDIAs cutting-edge products across AI, graphics, data center, and automotive domains. You will collaborate with cross-functional teamsincluding silicon design, board design, firmware, and software engineeringto create innovative test methodologies that validate complex system-level interactions. Your insights and expertise will directly impact product quality, development efficiency, and time-to-market.

What you will be doing:

Architect end-to-end system validation strategies for new hardware platforms.

Define test coverage and validation methodologies.

Collaborate with hardware, software, Qual and QA teams to align on product requirements and test coverage plans.

Lead development of automation frameworks and diagnostics tools to enable scalable and repeatable testing.

Analyze test data to identify root causes, guide debug efforts, and improve validation coverage.

Provide technical leadership and mentorship across multidisciplinary teams and represent system test considerations in architecture and design reviews.

We are now looking for best-in-class Senior Chip Design Verification Engineer to join our outstanding Network Adapter Silicon group, developing the industry's best high-speed smart communication devices, Data Processing Unit (DPU), delivering the highest throughput and lowest latency! Come and take a significant part in verifying and designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Work within a Networking Fullchip team, which is responsible for delivering the chip to tapeout and serves as a critical verification stage before final chip release.

Gain a strong understanding of chip micro-architecture and features, and develop the verification strategyincluding checkers, testcases, and debug plans - for fullchip/cluster level validation.

Enable and validate new features at the fullchip/cluster level, ensuring high quality and reliability under challenging constraints.

Be an integral part of an innovative team, actively participating in the creation and implementation of new verification infrastructures using advanced AI tools.

We are looking for a Senior Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

We are looking for a Formal Verification Engineer for our Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our Switch team delivers world class Bridge and router solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. We have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.

You will work on developing new formal verification methodologies and tactics.

We are now looking for a Power Optimization and Analysis Engineer! We prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units power efficiency; you will be responsible for researching, developing, and deploying methodologies to help our products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of our Switches product line.

As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for our next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.

What You'll Be Doing:

Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.

Develop and share best practices for performing pre-silicon power analysis.

Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.

Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.

Select and run a wide variety of workloads for power analysis.

Prototype new architectural features in Verilog and power analysis.

Our Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, big data, and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry.

What you'll be doing:

Yield analysis monitoring and continuous improvement for mass production lines.

Troubleshooting and full root cause analysis for production matters.

Maintain products quality by improving test stability, coverage, design, and manufacturing process.

Driving task forces for product failure analysis.