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Our Networking team is looking for an outstanding candidate who thrives in a multifaceted environment, as a SW Release Manager. Taking care of world-class technologies in the areas of Data Centers, cloud, software defined networks, security for the most sophisticated markets and customers. The Networking Cluster Solutions SW group copes with a broad range of sophisticated networking solutions for AI, HPC and cloud. The candidate will need to ensure the release is delivered on time and in high quality, coordinate between development and testing groups and between global SW groups. In addition, the role will require to gain good understanding of E2E solutions dependencies.

What youll be doing:

Be an effective leader in crafting and driving a delivery of high quality SW in an efficient way.

Partner with Engineering, Operations, Architecture and Marketing to coordinate the release of the products and ensure release will meet the schedule and with high quality.

Take full ownership on the relevant products from the kickoff to signoff.

Work with planning and tracking systems to lead the release progress, and build release indicators.

Partner with the QA teams to ensure alignment of all tests between the development, verification and QA groups.

Conduct and Attend release meeting and communicate release status. Resolve issues when they appear and raise red-flags when needed.

Collaborate with teams across the globe to drive process changes that can help improve development and release workflow.

Improve process, guidelines, checklists across NCS group.

We are seeking a Senior Networking Software Engineer to join our RDMA Transport Software team, driving the development of next-generation RDMA solutions for AI, cloud, HPC, and storage. You will research and develop innovative transport algorithms that push the limits of performance and scalability. You will work in a fast-paced, collaborative environment alongside talented engineers from around the world, supporting the data needs of the worlds largest enterprises

What you'll be doing:

Take part in research, design, and development of advanced RDMA transport mechanisms and algorithms, enhancing performance, reliability, and scalability.

Collaborate closely with hardware engineers, software developers, and system architects to align on project objectives and requirements.

Keep up with industry trends and emerging technologies, integrating new ideas and innovations into the development process.

We are looking for a Senior Project Manager to join the Israeli Networking Cluster Solutions group. The project manager will be responsible for the definition, planning and execution of multidisciplinary projects for building our clusters in Israel. Direct communication with Architecture, R&D, Operations, Finance, IT, Security, and all relevant stakeholders within and outside of us. Accountable and responsible for the success of the relevant Cluster build programs.

What youll be doing:

Own entire activities associated with planning and executing projects for building large Clusters for us in Israel.

Co-work with our teams on different disciplines associated with building large scale clusters Data-Center Engineering, Data-Center Operations, Corporate-IT, Planning, Finance and more.

Manage periodic sync meetings within us and with external stakeholders to track and monitor projects meetings.

Present project status to our senior executive team.

Matrix management of internal teams and resources for successful execution of projects and activities.

We are looking for a versatile Senior Software Engineer for the DPU Platform team. This position offers the opportunity to have real impact in a multifaceted, technology-focused company affecting product lines that empower the most advanced data centers in the world. Using your deep knowledge of embedded platforms, operating systems, and software distribution technologies, you will work with a world-wide development team to solve the unique challenges of delivering the world's most powerful platforms.

What you'll be doing:

Develop system software components including processor firmware and bootloaders, kernel drivers/modules, and user space applications and libraries.

Collaborating with hardware and product design teams to develop software for sophisticated SOC platform designs.

Assisting world-wide teams with various customers' and internal DPU projects.

Tackle complex system-level optimization and resource utilization challenges.

Participate across all levels of product development lifecycle that values high-standards for clear requirements, software quality and performance.

Collaborate within a worldwide matrixed software development team, and have broad impact within our highly-dynamic and technology-focused company.

We are looking for a QA and Automation Engineer to join our SW Management team. This position will be part of the QA team while the main goal is to test SW Management tools and high-performance computer systems. Our SW Management tool is revolutionizing data center networking management, by combining enhanced, real-time network telemetry with AI-powered cyber Intelligence and analytics to support scale-out InfiniBand data centers.

What you'll be doing:

Design, develop, and execute tests for the new features, as part of SoC software GA releases or update releases.

Report bugs found during execution, assist with bug reproduction and debug sessions to understand root cause, verify bug fixes provided by the R&D team.

Designing & Automating regression tests including automation infrastructure in multiple code languages.

Integration testing with 3rd party components such as Linux Drivers / Network Cards and Operating Systems.

We are looking for a Test Development Engineer to join our team. This role will work as part of a team driven by the development of NVIDIA's networking and interconnect products. Do you have a passion for automation development, test program development, code writing and looking for sophisticated and significant topics? We will be happy to have your skills on the team. You will handle various projects across teams, build test plans, automate test specification and execution. You will continuously innovate and develop scalable, reliable, high-performance systems and tools to enable the next generation of Interconnect products.

What Youll Be Doing:

Will work on projects across multiple functional teams from different geographies throughout the product lifecycle

Develop test plans, and execute testing via automation and manually for all supported hardware releases

Work with cross-functional teams across engineering, thermal, mechanical, and HW to identify test requirements

Develop automation and tools for NVIDIA hardware releases and test environment

Debug HW & SW failures in interconnect products, Isolate the problem, and get to the root cause

Design and build technical processes to address business issues

Deploy the test solution to the production sites and provide support if needed.

Train personnel on the required processes and operations of complex test systems.

Ensure all testing is being conducted in compliance with all safety protocols.

We are seeking an experienced Senior Software Engineer to join our NIC Firmware Core team, with a special emphasis on simulation for network adaptors and verification infrastructure. Youll be part of a forward-thinking team dedicated to advancing the tools and frameworks that are used to develop the cutting-edge networking adapter technologies. Your role will be to drive the success of our current and upcoming networking devices by working across various platforms, including C++ object-oriented simulation, verification frameworks and C layer interfacing hardware and firmware.

What Youll Be Doing:

Develop a network adapter simulator that will be used for both development and testing of pre-silicon networking features.

Take part in implementing and assimilating frameworks for Design and Verification both for real-time and simulator environments.

Addressing and solving automation and performance challenges.

Collaborate with chip design, software, and architecture teams to define and craft legacy and new firmware flows.

We are at the forefront of AI-driven innovation in VLSI design automation. Join us to shape the future of semiconductor design with cutting-edge AI tools and make a significant impact in a collaborative, high-performance environment. Are you ready to push the boundaries of whats possible in VLSI CAD? Come be part of our pioneering team!

What you'll be doing:
You will be responsible for developing and integrating advanced CAD solutions and automation flows using AI and machine learning for VLSI design, verification, and implementation.
Work closely with design, verification, and CAD teams to identify areas for improving VLSI workflows using advanced tools and methods.
Research, prototype, and deploy AI-based algorithms.
Develop and maintain scripts and automation infrastructure to enable seamless adoption of AI tools in the VLSI design process.
Continuously review emerging AI technologies and methodologies to keep our CAD environment up-to-date.
Provide technical support and training to engineering teams on AI-enabled CAD flows and best practices.

We're looking for a Computer Vision software engineer with a passion for deep learning, real-world impact, and collaborative innovation.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.

We have been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people.

Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an NVIDIAN, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

At NVIDIA Networking, we are driven by innovation and excellence. Our team in Israel is looking for a dedicated Chiplet Layout owner to join us in defining the next era of AI's networking. This is an outstanding opportunity to work with innovative technology and collaborate with some of the most experienced minds in the industry. If you are ambitious, passionate about flawless design, and eager to make a lasting impact, this role is perfect for you!

What you'll be doing:
Be part of a cross-business-unit team and own the high-speed IP integration.

Build a Chiplet floorplan layout design from early assembly/planning through implementation and signoff.

Work closely with partition owners and Full Chip STA engineers to assure high quality and timely convergence.

Define and implement efficient, high-quality Full Chip/Chiplet physical design tools, flows, and methodologies.

Gain hands-on experience implementing the partition-level BE design (RTL2GDS).

We are seeking a highly motivated and experienced System Test Architect to define, develop, and drive comprehensive validation strategies for next-generation hardware platforms. As a key member of our hardware architecture and systems engineering team, you will be responsible for ensuring the robustness, performance, and scalability of NVIDIAs cutting-edge products across AI, graphics, data center, and automotive domains. You will collaborate with cross-functional teamsincluding silicon design, board design, firmware, and software engineeringto create innovative test methodologies that validate complex system-level interactions. Your insights and expertise will directly impact product quality, development efficiency, and time-to-market.

What you will be doing:

Architect end-to-end system validation strategies for new hardware platforms.

Define test coverage and validation methodologies.

Collaborate with hardware, software, Qual and QA teams to align on product requirements and test coverage plans.

Lead development of automation frameworks and diagnostics tools to enable scalable and repeatable testing.

Analyze test data to identify root causes, guide debug efforts, and improve validation coverage.

Provide technical leadership and mentorship across multidisciplinary teams and represent system test considerations in architecture and design reviews.

We have been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. Youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

Are you ready to take your engineering career to the next level? We are a world-class technology company, is seeking a passionate Senior Package Engineer to join our team in Israel. In this role, you will have the opportunity to collaborate with several design and program teams in the development of sophisticated IC substrates for our groundbreaking products. We are committed to delivering exceptional solutions in a wide range of sectors, and we are looking for engineers who share our passion and dedication to making a difference in the world through their inventions. As a Senior Package Engineer, you will work closely with SI, layout, and ASIC design teams to develop complex, top-of-the-line ASIC packages. You will be responsible for planning schedules, resolving costs, packaging, manufacturing, and electrical design issues.

What you'll be doing:

Leading the development of groundbreaking microelectronics packaging for our Networking Business Unit's future products.

Collaborating with world-leading vendors to develop highly ambitious packaging solutions.

Thriving in a dynamic and challenging environment.

Joining and leading task forces to investigate and support production excursions, failure analysis, and reliability issues.

We are now looking for best-in-class Senior Chip Design Verification Engineer to join our outstanding Network Adapter Silicon group, developing the industry's best high-speed smart communication devices, Data Processing Unit (DPU), delivering the highest throughput and lowest latency! Come and take a significant part in verifying and designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Work within a Networking Fullchip team, which is responsible for delivering the chip to tapeout and serves as a critical verification stage before final chip release.

Gain a strong understanding of chip micro-architecture and features, and develop the verification strategyincluding checkers, testcases, and debug plans - for fullchip/cluster level validation.

Enable and validate new features at the fullchip/cluster level, ensuring high quality and reliability under challenging constraints.

Be an integral part of an innovative team, actively participating in the creation and implementation of new verification infrastructures using advanced AI tools.

We are now looking for a Power Optimization and Analysis Engineer! We prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units power efficiency; you will be responsible for researching, developing, and deploying methodologies to help our products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of our Switches product line.

As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for our next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.

What You'll Be Doing:

Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.

Develop and share best practices for performing pre-silicon power analysis.

Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.

Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.

Select and run a wide variety of workloads for power analysis.

Prototype new architectural features in Verilog and power analysis.