לוח משרות דרושים מהנדסים משרה מלאה

The MLIL DataPlane team is looking for a Senior Software Development Engineer to own the design and implementation of our inference data plane. We build the software that makes large models run efficiently on custom hardware - spanning model execution, memory management, data movement, and serving integration.
Our work covers the full inference path: integrating serving engines with custom hardware, developing high-performance compute kernels, enabling efficient data movement, and driving models from early validation through production. We operate at frontier scale with large distributed models.
This is a ground-up effort with rapidly evolving hardware and software. We need a senior IC who can write and optimize low-level code for custom hardware, validate model architectures end-to-end, build test and profiling infrastructure, and drive performance across the stack.

Key job responsibilities
- Develop and optimize compute kernels for a custom ML accelerator architecture, targeting production-level performance for large language model inference.
- Implement and validate LLM architectures (decoder-only, mixture-of-experts) end-to-end - from PyTorch model definition through distributed execution on custom hardware.
- Integrate custom accelerator backends into open-source ML serving frameworks (vLLM, PyTorch), including scheduler extensions, memory management, and model parallelism.
- Build and maintain test infrastructure for model correctness validation across CPU, GPU, simulator, and hardware targets.
- Profile and optimize inference workloads - identify bottlenecks, instrument critical paths, and drive latency and throughput improvements from simulation through hardware bringup.
- Own features end-to-end: from design through implementation, testing, and integration into the broader software stack.
- Contribute to CI/CD pipelines that gate model and kernel changes on correctness and performance regressions.
- Mentor engineers, drive design reviews, and raise the engineering bar across the team.

We are looking for an Experienced HW SERDES Engineer to join Annapurnas SPIV (System Platform Interface validation) team.
As a member of the SPIV team, you will own End-to-end subset of system PCIe SERDES interfaces across range of products through product life cycle:
1. Validation and qualification.
2. Integration.
3. Deployment and post-deployment support.
4. Failure analysis.
5. Pre silicon activities for new technologies.
As owner, you will set the strategy for PCIe SERDES qualification over multiple platforms, ensure the design worked well and drive complex system debugs involving HW and FW components.

You will define NPI practices and engage in pre-silicon efforts to explore new technologies and mitigate integration risks. You will enhance SERDES qualification results with large scale customer performance analysis to discover SERDES life-cycle issues and mitigate them.

This is a fast-paced, intellectually challenging position, and you will work with thought leaders in multiple areas of technology. We are changing industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

Key job responsibilities
- Approve future products PCIe SERDES technologies.
- Define new products SERDES qualification and validation strategy and lead the execution.
- Engage integrations of Annapurna Labs products with other vendors PCIe HW components.
- Support ongoing integrations of PCIe SERDES in new products.
- Lead triage, PCIe SERDES debug and root cause analysis of systems in AWS data centers.
- Drive and maintain training, quality documentation and collateral to improve in-fleet operation.

We are looking for an energetic, detail-oriented individual to join our Data Center Engineering Operations Team. This committed group works to maintain the critical physical infrastructure that supports our Web Services. Specifically, this team works to ensure that the data center's MEP operates at 100% availability while maintaining first-class customer service to the teams and groups within the data centers.
The Data Center Engineering Operations Facility Engineer is responsible for operating and maintaining all electrical, mechanical, and fire/life safety equipment within the data center.
DCEO Facility Engineers are our front line responders for hands-on electrical and mechanical equipment troubleshooting and operation. This equipment includes, but is not limited to, stand-by diesel generators, switchgear, UPSs, PDUs, AHUs, chillers, cooling towers, chemical treatment systems, pumps, motors, VFDs, and building automation systems.

Key job responsibilities
- Operate and maintain mechanical and electrical equipment.
- Perform root cause analysis of equipment failures.
- Troubleshooting of facility and rack-level events within internal SLA.
- Ensure all safety procedures are adhered to while performing work.
- Able to work shifts (rotating work days during the weeks).
- Take daily operational readings of all mechanical and electrical equipment.
- Utilize internal CMMS to manage building workflows.

We are looking for System Software Engineer to help define, shape, and integrate advanced solutions for the next generation of our cloud platforms.

Join our dynamic System Software team in creating innovative software solutions that power our product development lifecycle from conception to deployment. You'll develop critical tools that ensure product excellence across design, validation, manufacturing, and production environments


Key job responsibilities
Design and develop software tools for all product development stages (card level, rack level).
Collaborate with hardware engineers, firmware developers, and system architects.
Create and maintain debugging tools and utilities
Develop comprehensive documentation and provide training for tools.
Optimize testing and validation processes for coverage, speed, efficiency, and resource utilization.
Research and implement new technologies to enhance the testing ecosystem.
Support critical system troubleshooting and issue resolution.
Participate in design reviews and provide technical guidance on testability.

Come join the Agentic AI science team in building the next generation models for intelligent automation.

We are looking for world class researchers with experience in one or more of the following areas - autonomous agents, API orchestration, Planning, large multimodal models (especially vision-language models), reinforcement learning (RL) and sequential decision making.

We're looking for a talented SoC Integration Lead to join our Nitro team and help shape what comes next. You will spearhead the SoC integration activities of sophisticated networking chips, collaborating closely with Architecture, RTL Design, Physical Design, Package Design, Verification, Software, DFT, and additional teams in a dynamic, open, and fast-paced environment. As a member of the Nitro project, you will have influence over the device through its entire lifecycle from product definition to mass production. You'll work alongside a world-class, fast-moving engineering team, take full ownership of critical IP blocks, and see your work deployed at a scale no other platform can match, powering hundreds of thousands of businesses across 190 countries.

Key job responsibilities
Take full ownership of SoC integration, including IPs development, partitioning, clock domain crossing (CDC), reset domain crossing (RDC), exploratory synthesis, and design quality verification.
Drive chip-level design implementation by partnering with multiple teams including Architecture, RTL Design, DFT, Verification, System Verification, STA, and Physical Design.
Oversee the creation of SoC-level IP blocks such as fabrics, interfaces, and security modules.
Lead RTL integration activities including micro-architecture definition, RTL coding and debug, synthesis and timing closure, and sign-off.
Address diverse functional and structural challenges, encompassing functional debugging, physical design preparation, emulation, and design quality issue resolution.
Contribute to the creation and implementation of design flows and automated solutions that facilitate efficient SoC development.
Support Verification and Emulation teams through test plan development and coverage review.
Ensure the chip meets quality and reliability standards while delivering to physical design teams, emulation platforms, firmware developers, and other stakeholders.

Required Al Infrastructure & Reliability Engineer
What this role is really about
Youll join a 3-person platform team within our Business Technology group -owning the internal infrastructure that our AI platform and its users depend on. This isnt a product engineering role, and it isnt ticket work or babysitting pipelines someone else built. Youre building and operating the internal foundation that the company runs on. The work covers the full stack of platform engineering: core cloud infrastructure (AWS, Kubernetes, IaC), CI/CD pipelines, AI-driven infrastructure components, and the SRE and observability practice that keeps it all honest -metrics, alerting, incident response, and reliability standards. As our AI capabilities grow, so does the complexity underneath them, and staying ahead of that is central to the role. If you treat infrastructure as a product -reusable, automated, observable, and built to last -this is your kind of role.
Job responsibilities
DevOps & AI-Driven Infrastructure - own CI/CD, deployment processes, and release reliability. Build and operate cloud infrastructure that is automated, intelligent, and continuously self-improving - not just managed.
Design and build our Terraform repository and IaC pipeline from scratch -AI-assisted generation, drift detection, and policy enforcement built in.
Build AI-driven GitHub Actions pipelines -automated code review, risk assessment, and intelligent deployment decisions.
Manage Kubernetes workloads across AWS accounts -zero downtime, fully automated, nothing left behind.
Embed AI into the operational layer -proactive drift detection, automated remediation, and intelligent scaling toward a self-healing runtime.
Reliability & SRE -improve uptime, resilience, and incident response.
Define and enforce SLOs/SLIs, error budgets, and on-call practices.
Lead incident response, postmortems, and systemic reliability improvements.
Own AI-specific reliability: model latency SLOs, token quota monitoring, rate limit handling, fallback and retry strategies, and cost-per-request alerting.
Observability & Telemetry - increase visibility, reduce noise, improve troubleshooting.
Establish and continuously evolve the observability stack: metrics, logs, distributed tracing, and alerting tuned for both application and AI workloads.
AI / LLM Operations- bringing AI systems to production and operating them at scale, with a focus on reliability, performance, and trust.
Own the AI infrastructure layer: rate limits, quota management, latency SLOs, and fallback strategies (retries, circuit breakers).
Operate LLM APIs in production with resilience and cost attribution per team/model.

The MLIL FLOW team is looking for a Senior Software Development Engineer to lead the design and delivery of systems software for our next-generation ML accelerator servers. We build production software to validate, initialize, monitor, and qualify these servers - from first silicon through fleet-scale deployment. We work on the physical systems that execute ML workloads: Server bring-up, hardware diagnostics, interconnect validation, power/thermal monitoring, and fleet-scale operations are our bread and butter.


Key job responsibilities
Lead the architecture and implementation of hardware validation and diagnostic software for new ML acceleration platforms.
Drive technical direction for PCIe validation, power/thermal diagnostics, and stress-testing frameworks that run across manufacturing, vetting, and production environments.
Own subsystems end-to-end: from design through implementation, testing, deployment, and operational excellence at fleet scale.
Work with Hardware, Manufacturing, EC2 teams to create coordinated software packages that enable both qualification and rapid deployment.
Debug and root-cause complex hardware/software interaction failures on first silicon and production fleet returns; drive root-cause to closure.
Build and maintain data pipelines, dashboards, and monitoring systems for fleet health and performance benchmarking.
Mentor engineers, define best practices, drive design reviews, and raise the bar for the team.
Lead multiple development initiatives in parallel, balancing schedule, risk, and technical quality across a fast-moving hardware program.

We're looking for an exceptional senior Chip Design Engineer to join our Nitro team and help shape what comes next. You'll work alongside a world-class, fast-moving engineering team, take full ownership of critical IP blocks, and see your work deployed at a scale no other platform can match - powering hundreds of thousands of businesses across 190 countries.

As a Senior Chip Design Engineer on the Nitro team, you will take full end-to-end ownership of one or more critical IP blocks within the product, guiding them from micro-architecture definition through RTL design, debug, synthesis, timing closure, and final sign-off before tape-out. Your work will ship in silicon that powers AWS at global scale.
You'll partner closely with the Verification and Emulation teams to shape test plans, review coverage, and close gaps early in the design cycle. Beyond your own IP, you'll collaborate across disciplines with Product Definition, Software, Physical Design, and Verification teams to deliver a fully integrated, production-ready chip.

Key job responsibilities
* Full ownership of one or more IPs within the product:
- Micro-architecture definition.
- RTL coding and debug.
- Synthesis and timing closure.
- Sign-off before tape-out.
* Supporting the Verification and Emulation teams: Test plan development, coverage review.
* Ensuring the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical Design.

We are looking for a seasoned and execution driven R&D Team Lead. This role focuses on leading a software/AI engineering team, developing and delivering strategic business impact. As part of this role you will build and grow a strong team of engineers empowered with AI in your day to day. You will be part of shaping our R&D technological excellence, driving new initiatives and defining the architecture to support our evolving business growth. You will work in a global environment with highly-skilled product managers, analysts and other engineering teams reporting to the VP R&D.
What Youll Do?

Build and lead a strong team of 4-6 software engineers fostering a culture of ownership, collaboration, and technical excellence.
Take end-to-end ownership of key domains within a complex, high-impact system, driving technical decisions, execution, and outcomes.
Use AI-powered development tools and agentic technologies to improve teams velocity and quality.
Remain hands-on across a modern full-stack environment contributing directly to production while guiding others.
Our stack - GCP (and AWS), React/Node.js (TS), Golang and MySQL.

We are hiring a Mechanical-Thermal Design Engineer to help define, shape, and integrate the next generation of our ML training and inference accelerators. In this role you will own the mechanical-thermal design of add-in / mezzanine cards, high-power GPU sleds and full ML racks. You will work shoulder-to-shoulder with HW, FW, and silicon teams to drive decisions on cooling solutions, power delivery packaging, structural integrity, and manufacturability, and will lead the mechanical-thermal engagement with our ODM, component vendors and data-center operators.

Key job responsibilities
1. Own the mechanical-thermal design of Annapurna next-generation Machine Learning sled and rack (including thermal solutions and mechanical challenges on PCB / chassis / rack level).
2. Lead and review mechanical and thermal design performed by ODM partners or contractors and component vendors.
3. Debug mechanical and thermal failures on production data center; drive root-cause to closure; take previous learnings to next products.
4. Design and execute mechanical and thermal experiments in the lab - from DOE through measurement, analysis, and corrective action.
5. Travel to ODM/manufacturer/vendor sites to monitor and review project kickoffs, device bringups and manufacturing lines.

We are looking for a SoC / IP Architect to shape the next revolution in electronics!
Responsibilities
Define and design architecture: Create the overall SoC/IP architecture based on product and customer requirements and define detailed technical specifications.
Collaborate with cross-functional teams: Work with a variety of teams, including logic design, verification, firmware architecture and development teams, and physical design, to ensure successful execution.
Lead technical discussions and architectural reviews, guiding design and verification teams to deliver scalable, high-quality implementations.
System-level integration: Ensure seamless hardware-software co-design by working on aspects like control paths, interrupt schemes, and debug infrastructure.
Drive architectural decisions that optimize scalability, and future readiness for next-generation applications.

We are seeking an Applied Scientist to help build our next-generation customer memory and personalization systems.

As an Applied Scientist, you will design and build ML and LLM-powered solutions for our customer memory and personalization systems. You will work on how customer knowledge is extracted, validated, and applied in production systems.

You will own the end-to-end delivery of ML solutions, from problem formulation and modeling to offline and online experimentation, and production deployment at scale. You will deliver high-quality, scalable systems that power customer-facing experiences.
You will drive work across areas such as fact extraction, memory quality and lifecycle, temporal reasoning, and grounded personalization, while navigating tradeoffs between quality, latency, and coverage.
You will collaborate closely with engineering and product teams to translate research into measurable customer impact.

We are seeking an Applied Scientist to help build our next-generation customer memory and personalization systems.

As an Applied Scientist, you will design and build ML and LLM-powered solutions for our customer memory and personalization systems. You will work on how customer knowledge is extracted, validated, and applied in production systems.

You will own the end-to-end delivery of ML solutions, from problem formulation and modeling to offline and online experimentation, and production deployment at scale. You will deliver high-quality, scalable systems that power customer-facing experiences.
You will drive work across areas such as fact extraction, memory quality and lifecycle, temporal reasoning, and grounded personalization, while navigating tradeoffs between quality, latency, and coverage.
You will collaborate closely with engineering and product teams to translate research into measurable customer impact.

We are a Software Embedded Development Engineer to design, develop, and optimize mission-critical embedded software for cloud infrastructure. You will join teams focused on networking, machine learning acceleration, and high-performance computing (HPC), impacting millions of our services globally.

Cutting-Edge Technology: Work on custom silicon (e.g., Graviton, ML accelerators) and innovative networking solutions at the intersection of hardware and software.

Growth & Innovation: Benefit from AWSs resources, mentorship programs, and opportunities to publish technical content.