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This is a high-ownership, builder-first Sr. Software Engineer role. You will design, build, and ship AI-integrated data systems from concept through production - owning outcomes end-to-end, including deployment, monitoring, cost, and business impact.

We are seeking a candidate who views AI tooling as a fundamental force multiplier in their daily engineering process. This position is central to our transition into an AI-native function, requiring an individual capable of making decisive, pragmatic architectural choices on reversible matters to maintain momentum. We need an experienced builder of production-grade, data-centric systems who is obsessed with delivering customer value and possesses a deep, curious enthusiasm for the transformative potential of AI.

What You Will Build
AI-Native Systems Development. Design, build, and own scalable data and ML pipelines, backend services, and AI-powered capabilities that are part of the platform's production decision-making layer. AI and ML components are runtime dependencies in this role - not research projects or experiments. Candidates will have strong back end and data engineering skills to thrive in this space.
Daily Shipping. Decompose complex work into safely mergeable increments and ship them daily. Treat large, multi-day pull requests as a risk to momentum. Use feature flags, canary releases, and rollback architecture to manage risk through isolation - not through avoidance.
AI-Augmented Engineering Workflow. Leverage AI-assisted development tooling (code generation, automated testing, architecture prototyping) as a core workflow multiplier. Evaluate and experiment with emerging AI tools and frameworks with direct hands-on engagement. Bring technical depth to AI fluency - architecture and capability tradeoffs, not surface-level awareness.
End-to-End Ownership. Own your work from design through production deployment, operational monitoring, and business impact measurement. Accountability extends beyond the feature to CI/CD pipeline health, observability, cost efficiency, and domain-level outcomes.
Architectural Decision-Making. Make pragmatic, timely architectural choices that balance modern AI and data technologies with reliability, cost, and delivery speed. Distinguish reversible vs. irreversible decisions and move forward without waiting for consensus on the former. Document decisions in lightweight ADRs and own the outcomes.
Cross-Functional Collaboration. Partner with product, design, infrastructure, and GTM teams to translate customer and business needs into technical solutions. Operate with business awareness - understand how your systems impact revenue, customer outcomes, and strategic priorities.

we are the leader in hybrid-cloud security posture management, using the attacker's perspective to find and remediate critical attack paths across on-premises and multi-cloud networks. we are  looking for a talented Senior Big Data Developer to join our Vulnerability Risk Management (VRM) team. Join a team building the data platform behind XM Cyber's Vulnerability Risk Management (VRM) - a system that ingests, normalizes, and correlates vulnerability and asset data from on-premises networks, endpoints, and physical machines at enormous scale. You'll design the pipelines that fuse CVE severity, EPSS exploit-prediction, and business impact with attack-graph context, turning billions of raw findings into a ranked, actionable picture of real risk. The result: customers stop chasing every CVE and start fixing the handful that are genuinely exploitable on their critical assets.
This role provides the opportunity to lead end-to-end design & implementation of advanced server-side features using a wide range of technologies: Apache Spark, Apache Airflow, Scala, k8s, with Relational Database, Redis, Kafka, Dockers. If you are up for the challenge and you have the 'XM factor', come and join us!

We are looking for an HPC and AI Data Center Engineer to join the networking cloud solutions HPC/AI Infrastructure team. We are focused on building supercomputers and HPC clusters based on groundbreaking technologies. We are looking for a lab manager, be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and GPU computing. Take part of building large-scale compute and Deep Learning software and hardware platforms, work together and support many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions.

What you will be doing:

Plan and build complex cluster and supercomputers in various of data center and labs.

Rack stack and cable management to ensure efficient use of space and easy maintenance.

Ensure data centers and labs power and cooling efficiency while optimizing rack space utilization.

Data centers and labs daily operation and support.

Installations for variety of infrastructure and solutions - Cloud, VMs, Storage, Network, HPC and AI.

Perform troubleshooting - network, optic cabling, bare metal, operating system.

Support Research & Development activities.

We are seeking an AI Networking Architect to join the Networking Research Group. This role will help bridge the gap between emerging tasks supported by advanced technologies and the data center infrastructure that powers them. In this role, you will work at the intersection of AI applications, distributed systems, networking hardware, and software architecture.

You will join a focused team of multidisciplinary engineers driving AI workload optimization through deep application understanding, network analysis, and end-to-end systems thinking. Your insights will directly shape our products across the full stack - from applications and software libraries to hardware architecture and physical design.


What Youll Be Doing:

Model the performance of complex AI workloads to identify bottlenecks and recommend system-level optimizations.

Analyze brand-new AI models, distributed training techniques, and inference workloads to understand their infrastructure requirements.

Build Platforms, simulations and HW platforms, execute AI workloads and build analytical tools to evaluate trade-offs across compute, memory, storage, and network behavior.

Translate research insights and workload behavior into actionable software, hardware, and networking architecture requirements.

Partner with architecture, software, and product teams to influence future NVIDIA networking and AI infrastructure roadmaps.

Drive architectural innovation by applying deep workload analysis to real-world advanced machine learning frameworks.

We are looking for an excellent DevOps engineer to join the Switch and Firmware DevOps team and make a wide impact on the company products and teams worldwide. The role includes the development of cutting-edge design automation tools, build systems, and continuous integration systems. With your help, our supportive and friendly team will be able to focus on more exciting programming tasks, better serving the needs of our customers through new and improved CI processes. We work in a dynamic environment where multiple projects will be active at once and priorities may shift frequently.

We are looking for hardworking engineers who arent afraid of taking up new technologies, processes, and tools to make constant improvement in the automation infrastructure. The engineer will collaborate closely with our software developers as well as performance analysts to build and improve the world-class automation infrastructure.

What youll be doing:

Develop and support CI processes of various products.

Coordinate with various teams across the globe to promote and improve CI practices.

Build infrastructure for effective, high-quality development and release efforts.

Be a part of an experienced team with a great atmosphere.

We are looking for a Director from the FE ASIC domain to lead the Design Technology team. The team is responsible for driving AI-powered engineering productivity and developing, supporting, and operating the systems, tools, infrastructure, and automation solutions that enable the work of the design and verification teams in the networking ASIC group. A key objective is to maximize engineering productivity, design quality, and execution efficiency by accelerating the adoption of AI-assisted workflows, scalable automation, and advanced design technologies, while continuously evolving engineering tools and flows to meet the rapidly changing needs of AI-driven development. This position offers the opportunity to think outside the box and make a real impact on a dynamic, technology-focused company.

What You'll Be Doing:

Lead managers and team leads.

Collaborate with project leaders to define strategy, priorities, and execution plans across strategic programs.

Drive the development, deployment, operation, and adoption of design technologies, engineering infrastructure, automation, and AI-enabled solutions that improve chip design productivity, quality, and execution efficiency.

Evolve engineering tools, environments, and workflows to meet the changing needs of AI-driven development and design engineering.

Ensure high-quality support and enablement for internal engineering users through training, documentation, troubleshooting, and continuous service improvement.

Partner with methodology and engineering stakeholders to drive adoption and continuous improvement of design and verification flows.

we are looking for a Data Analyst.
As a Data Analyst, you'll be instrumental in constructing and managing the AI rules engine, alongside pinpointing network patterns to deliver value across various domains for our clients. This role requires proficiency in deriving insights from data and conducting thorough analyses. Additionally, it offers significant autonomy for innovation and creativity, qualities we encourage in all team members. Strong teamwork and interpersonal skills are also crucial for success in this position.
Together, we can shape the future of network security.
Responsibilities:
Take a significant part in data analysis, contributing to our ever-evolving automation engine.
Research various network behaviors and patterns.
Preform data research to classify network entities based on behaviors and patterns.
Write and implement creative scripts to achieve data science-oriented goals.
Characterize and define new product features.
Work closely with Data Engineering teams to ensure the optimal solution is built in terms of logic and infrastructure.

We are looking for a talented, fast learner, and highly motivated Chip Design - Verification Engineer. As a member of our Chip Design Team, you will be responsible for verifying portions of the design, of a high performance and low power chip, focusing on such tasks as micro-architectural understanding, Verification environment coding and logic debug. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines roadmap. We have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you'll be doing:

As a member of our Chip Design team, you'll own and be responsible for crafting and timely delivery of a verification components and quality of Chip Design related logic. Day to day tasks include:

Understand and analyze uArch definitions.

Implement verification components to verify RTL meets specifications.

Collaborate with our RTL, Arch and uArch teams.

Work on logic related to switch design.

We are looking for a highly skilled and versatile Backend Engineer to join our development team. As a Backend Developer, you will be responsible for designing, developing, and maintaining the infrastructure and components of our platform. As part of your role, you will work on the backend aspects of our platform and collaborate with stakeholders and cross-functional teams to optimize full-cycle system performance.
Responsibilities:
Develop and maintain code deployed on the cloud side and on Linux.
Collaborate with cross-functional teams to achieve project goals.
Implement high-performance applications with high coverage, maintaining minimal footprint ensuring code is maintainable.
Troubleshoot and resolve complex technical issues related to Linux internals.

We are looking for a highly skilled and versatile Backend Engineer to join our development team. As a Backend Engineer, you will be responsible for designing, developing, and maintaining the backend infrastructure and components of our platform. As part of your role, you will also work on the frontend aspects of our platform and collaborate with stakeholders and cross-functional teams to optimize full-cycle system performance
Responsibilities:
Design, develop, and maintain backend systems and APIs to support our web applications
Implement and optimize data storage solutions, including databases, to ensure efficient and reliable data management
work closely with front-end developers to integrate backend functionalities and ensure a seamless user experience
Collaborate with product managers, stakeholders, and cross-functional teams to gather requirements, translate them into technical specifications, troubleshoot and resolve backend-related issues, and optimize system performance

We are now looking for a Chip Design & Verification Engineer to join our Switch Silicon team for Verification / Design roles. As a Chip Design & Verification Engineer in our Networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Micro-architecture for RTL and simulation environment planning for units and modules.

Design/Verify RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

Build reference models, verify, and simulate chip blocks/entities according to specifications.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.