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We are looking for a Distinguished Engineer to help shape the future of AI infrastructure. As part of our advanced development and research efforts, you will drive technical vision and innovation across the AI software stack, spanning GPU computing, RDMA, NVLink, storage, and large-scale distributed systems. You will research next-generation system designs, influence product and platform direction, and help define how massive-scale AI environments are built, optimized, and operated through hardware-software co-design.

What youll be doing:

Research, define, and drive co-design solutions across AI software stacks involving GPU computing, RDMA networking, NVLink interconnects, storage, and large-scale distributed infrastructure.

Lead deep technical investigations and proof-of-concept development in areas related to distributed AI, deep learning systems, high-performance computing, virtualization, memory management, and large-scale systems design.

Work closely with multiple teams across us to advance next-generation AI infrastructure technologies and influence cross-stack co-design decisions.

Analyze end-to-end system bottlenecks and opportunities across compute, networking, memory, and storage layers to improve performance, scalability, and efficiency.

Guide the design of environments that support massive-scale AI training and inference workloads in production.

We are looking for a best-in-class Chip Design - HW Emulation Senior Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in emulating our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. Join our world-class emulation team in Israel. Our focused team takes Switches/NICs/SoCs designs and program the emulators to behave like our silicon. Are you ready to take on interesting problems and craft solutions? Come check out our team.

What you will be doing:

The main responsibility is emulation and prototyping of complex chip designs. This includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.

The job also requires close collaboration with design, verification, and software engineers to enable embedded software and application software development.

Connecting emulator/FPGA based solutions to real external H/W or virtual targets, taking care of complex testbench and different protocols.

This is a role for a versatile engineer that includes RTL design, verification, FPGA partitioning and implementation, scripting, and lab-based bring up of the design.

We are looking for a dedicated SoC Clocks Design Automation Engineer to join our Networking Silicon team. In this role, youll focus on developing and supporting clock-related design flows and methodologies for SoC and networking chips, ensuring efficient and high-quality design implementation. Youll also chip in to SoC top-level automation and integration activities, building on existing flow infrastructure to improve efficiency and consistency across projects. Introduction

What you'll be doing:

Develop and maintain design automation and methodologies for SoC and networking clock flows.

Collaborate with design, STA, and project teams to ensure timely and high-quality design closure.

Develop and improve SoC top-level automation scripts and flows built upon existing infrastructure and tools.

Support SoC integration and construction flow activities across multiple projects.

Assist in timing, power, and noise analysis to ensure efficient performance.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.

What you'll be doing:

Designing and implementing SOC level clock requirements.

Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks.

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues.

What you'll be doing:
Develop, model, and validate groundbreaking power and performance optimization techniques for network fabrics, components (NICs, Switches), and systems. Collaborate closely with cross-functional teams including silicon design, system architects, software/firmware engineers, performance analysts, thermal engineers, and AI researchers to ensure end-to-end power and performance optimization. You will determine strategies that successfully implement flawless performance and power efficiency in our ambitious projects!

We are now looking for a best-in-class Chip Design Verification Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry - our GPU Super-Chip.

What youll be doing:

Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU.

Integrations and Full-Chip models.

Verification of chip blocks/entities according to specifications under challenging constraints.

Your daily work will involve all aspects of Design Verification : Planning, Coding, Coverage and Integration.

We are looking for a Host and Systems Performance Manager to join ur Networking Performance team!

In this role, you will lead a team of engineers who measure, analyze, and improve NIC, host, DOCA networking stack, and system-level performance across our networking products and platforms. We work across the full product lifecycle, from early architecture and pre-silicon modeling through post-silicon bring-up, validation, characterization, and GA readiness.

We are looking for someone who enjoys building teams, turning complex performance data into clear direction, and partnering across engineering groups to improve products that support AI, HPC, cloud, and accelerated networking workloads.

What Youll Be Doing:
Lead, coach, and develop a team focused on NIC, host, DOCA networking stack, and system-level performance. You will define performance test plans, methodologies, metrics, and success criteria for our new networking technologies.
Guide pre-silicon and post-silicon performance planning, analysis, reporting, and readiness reviews. Your team will benchmark and profile workloads across RDMA, RoCE, InfiniBand, Ethernet, MPI, NCCL, DOCA, storage, security, and host networking stacks.
Identify bottlenecks across NIC, DPU, CPU, memory, PCIe, firmware, drivers, Linux networking, DOCA, and full-system architecture. We will look to you to lead root-cause analysis, coordinate mitigation plans, and help hardware, firmware, software, architecture, validation, and product teams align on performance goals.

As a Production Engineer , you will support day-to-day production, develop assembly processes, create work instructions, and design production jigs and fixtures.

You will work closely with Production, R&D, Quality, and Supply Chain to improve manufacturability, resolve production issues, and help ensure smooth, reliable manufacturing operations.

Responsibilities:

Provide ongoing technical support to production lines and assembly teams, including real-time troubleshooting on the floor.

Design, define, and build jigs and fixtures to improve assembly accuracy, quality, and throughput.

Develop and implement detailed work instructions, including diagrams, images, and step-by-step assembly sequences.

Perform root cause analysis for production and quality issues and lead corrective and preventive actions.

Drive continuous improvement of production processes, focusing on efficiency, cycle time, and ergonomics.

Train operators and assembly personnel on work processes, use of jigs, and new standards.

Collaborate closely with R&D, Quality, Process Engineering, and Supply Chain to define and optimize production procedures.

Maintain and update relevant production documentation

You will be the analytical backbone behind project timelines and production progress. Your data and analysis will directly feed into how project schedules are built and tracked. You'll work closely with production management ,PMOs and procurement, translating floor-level and supply-chain data into clear, actionable insights.



Responsibilities

Execute MRP runs and manage material planning for complex Bills of Materials (BOMs)
Lead procurement activities, including opening purchase requisitions and production work orders (including establishing structured work orders in Priority, replacing current manual processes)
Monitor and control procurement and production processes in alignment with project plans
Prepare and present project status and inventory reports
Support and drive production floor activities, including defining processes at specific work stations.
Identify gaps and operational issues quickly, and drive fast, practical resolutions
Prioritize effectively under heavy departmental workload - know what needs attention now and what can wait.

What youll be doing:
Design and implement solutions throughout all layers from high level application, OS and driver subsystem to firmware.
Work on impactful projects involving state-of-the-art high-performance computing hardware and software.
Provide insight and technical guidance and collaborate with peers from across the company - including software architecture, chip architecture, and engineering departments to improve our future technology.
Collaborate with our partners and customers.

In this role, you will be a key contributor to defining the architecture and improving network performance for AI and High Performance Computing (HPC) workloads. You will be responsible for modeling advanced network topologies, configurations, logic and traffic patterns, and analyzing their effect on end to end performance. You will develop expertise in our simulation tools and contribute directly to their development road map and prioritization, develop core features in the simulator, and expose the capabilities to additional users. You will take part in complex architecture decisions, define and verify the modeling assumptions, and put them to the test vs. real HW and SW performance.

If you're passionate about tackling intricate challenges and contributing to comprehensive systems and working on innovative solutions, we want to hear from you.

What you'll be doing:

Analyze and model our AI and High Performance Computing offerings, deep dive into network behavior for training and inference and generate insights to directly impact the architecture of next-generations of AI systems. Conduct advanced network modeling, research and optimization using innovative simulation tools.

Implement modeling of advanced network topologies, configurations and traffic patterns which represent real life AI workloads, and analyze their effect on the systems performance. Actively develop the simulator software solution while contributing modular and scalable code.

Actively support the HW and SW development life cycles, map existing and candidate features into the simulation domain to enable their analysis, impact assessment and optimization.

Take full independent ownership of the performance modeling roadmap for a defined set of features. Interface directly with internal clients, communicate the analysis conclusions effectively and iterate on them. Drive projects from concept to completion.

Improve the quality of the simulation as a software product, ensuring robustness and reliability.

We are looking for a Hardware Failure Analysis Engineer to join the Interconnect FA team. This role will be part of the Product Engineering organization supporting our advanced high-speed interconnect and optical communication products.

The ideal candidate will lead failure investigations of complex hardware systems, including electro-optic modules, high-speed electrical interfaces, and optical interconnect components, supporting both production and customer-returned units. The role requires strong analytical skills, hands-on laboratory debugging, and the ability to drive root cause investigations across electrical, optical, and system domains.

What you'll be doing:

Lead failure analysis investigations on interconnect products including optical modules, AOCs, and high-speed hardware platforms.

Review architectural design aspects (electrical, optical, mechanical, process, and firmware) to identify potential design or integration issues.

Design, develop, and execute debug and validation test plans to identify root cause of hardware failures in production or customer-returned units.

Perform hands-on electrical and optical debugging using laboratory equipment and automated test systems.

Correlate electrical, optical, and system-level measurements to identify failure signatures.

Work closely with internal engineering teams (design, validation, manufacturing, reliability) and external partners to drive root cause and corrective actions.

Document investigation results and deliver clear technical FA reports summarizing findings and recommendations.

We are looking for a Hardware Failure Analysis Engineer to join the Interconnect Failure Analysis (FA) team. This role will be part of the Product Engineering organization supporting our advanced interconnect products used in AI and high-performance computing systems.

The ideal candidate is passionate about understanding how and why hardware fails at the physical level. You will develop and execute advanced physical failure analysis techniques to identify root causes in complex electronic and electro-optic assemblies. The role combines hands-on laboratory work, innovative sample preparation, materials characterization, and collaboration with multidisciplinary engineering teams to solve challenging hardware failures.

What you'll be doing:

Lead physical failure analysis investigations on advanced interconnect products, including PCBs, packages, optical modules, ASICs, and electro-mechanical assemblies.

Develop, optimize, and execute destructive and non-destructive sample preparation techniques to expose failure sites while preserving physical evidence.

Perform detailed failure analysis using advanced microscopy and analytical techniques, including: Scanning Electron Microscopy (SEM), Focused Ion Beam (FIB) cross-sectioning and circuit editing, Optical microscopy, X-ray imaging and CT, Cross-section analysis, Surface and fracture analysis

Correlate physical findings with electrical, optical, manufacturing, and reliability data to determine root cause.

Design new failure analysis methodologies and continuously improve laboratory capabilities, workflows, and best practices.

Partner with design, manufacturing, quality, reliability, packaging, and system engineering teams to drive corrective actions.

Generate clear technical reports documenting failure mechanisms, supporting evidence, and recommendations.

Evaluate and introduce new FA tools, sample preparation methods, and characterization techniques to improve investigation capability.

Join our dynamic team, responsible for managing and maintaining high-quality VLSI development infrastructure for the Backend Networking team. We seek a dedicated and driven Software Engineer eager to manage compute and storage effectively, develop scripts and automation, create dashboards and apps, leverage modern AI-assisted engineering workflows.

What you'll be doing:

Oversee and optimize compute and storage resources, ensuring operational efficiency and success of VLSI projects.

Develop and maintain scripts, automation tools, and AI-assisted workflows to streamline infrastructure tasks and improve developer productivity.

Design, implement, and maintain dashboards for monitoring and reporting on infrastructure performance and usage.

Work closely with a remote team in Israel, ensuring smooth communication and coordination on infrastructure-related tasks.

Engage in the entire lifecycle of infrastructure tool development, including design, testing, deployment, and maintenance.

Collaborate with other team members and DA teams to implement innovative software solutions and agentic coding practices using modern AI tools.