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We are looking for a talented and experienced engineer to participate in the physical design of the companys product for leading one of our BE projects. This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout. In this role, you will be at the center of the companys design efforts and will have a significant influence on product architecture.

Responsibilities
Generate and analyze critical block- and chip-level static timing constraints.
Spec and define full chip floor plan, including pin placement, partitions, and power grid.
Develop and validate high-performance, low-power clock network guidelines.
Perform critical block-level place and route and create designs that meet timing, area, and power constraints.
Review the vendors physical design verification flow at chip and block level and guide other designers on how to fix LVS and DRC violations.
Work with vendors on defining physical design methodologies and assist in flow development for chip integration.

We are looking for a talented and experienced engineer to participate in designing the next era of computer architecture. In this position you will take part in designing the critical parts of our future chips. You will transform architectural requirements to micro-architectural specs, implement key blocks in RTL, and participate in post-silicon activities.

Responsibilities
Define and drive the design of advanced blocks from micro-architecture phase to netlist.
Support timing and constraints definitions work closely with the BE team on timing and physical implementation efforts.
Leading processes relating to power optimization.
Technology expert, building a knowledge base for the group.
Work with various teams to drive execution (SW, Architecture, verification, BE, etc).
Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making.

We are seeking a highly skilled and motivated Electrical Validation (EV) and System Testing Engineer to join our team. This position is crucial in supporting the design, development and full testing.
The Electrical Validation team Lead manages the electrical validation function across our company hardware platforms. This role owns the validation strategy, methodology, lab infrastructure, and execution across all high-speed and control interfaces. The manager ensures robust electrical performance from early prototypes through production release and drives cross-functional alignment between design, SI, firmware, and manufacturing.
The role involves close collaboration with the HW R&D team, Quality, DevOps, and Contract Manufacturing (CM) teams to ensure the delivery of high-quality, reliable products.
This group is part of the HW R&D group.
Key Responsibilities
Define the electrical validation strategy for our company hardware platforms.
Own validation methodology for: High-speed Ethernet (100M-1600G), PCIe Gen1 to Gen5+, SerDes architectures (NRZ/PAM4), Control and management buses (I2C, SPI, RS-232, MDIO, etc.)
Build and manage a high-performance validation team.
Define lab architecture, including: Equipment selection (oscilloscopes, BERTs, analyzers), Compliance platforms, Automation frameworks, Signal integrity validation environments
Drive early engagement with board design and SI teams to ensure design-for-validation.
Oversee: Compliance (IEEE, PCI-SIG, OIF), Interoperability testing, Stress and margin testing
Lead root cause analysis of electrical failures and systemic issues.
Define validation documentation standards and sign-off criteria.
Implement full test traceability systems for production yield and stability monitoring.
Collaborate with R&D and Quality teams to drive product quality and reliability improvements.
Utilize and maintain a range of test equipment, including:
Work with various communication protocols: TCP/IP, Telnet, SSH, HTTP, SNMP, SFTP, SCP, FTP, RS232, GPIB, I2C, and NI-VISA.
Support testing of embedded systems running on Linux platforms.

A procurement NPI account lead will manage multiple complex activities / projects that support program, R&D and marketing to launch products from its early stages. In this role you will have to frequently contributes to the development of new ideas, design and cost reduction opportunities, building robust supply chain with optimized costs and high-quality standards to meet program objectives. Leads and provides expertise to functional project teams and may participate in cross-functional initiatives. Acts as an expert providing direction and guidance to process improvements. Building product BOM cost roadmap and monitor product health from procurement perspective.


Key Responsibilities

Lead procurement activities across the NPI lifecycle, from design concept through production release, ensuring supplier readiness and commercial alignment.
Serve as the procurement lead within the NPI core team, aligning sourcing execution with business objectives and manufacturing readiness.
Partner cross-functionally with key functions to translate requirements into effective procurement strategies.
Influence design and procurement decisions to optimize cost, lead time, manufacturability, and business continuity.
Lead supplier selection, qualification, and onboarding, ensuring the right balance of cost, quality, capacity, and risk.
Own commercial negotiations and supplier agreements, including pricing, lead times, tooling, and contracts.
Proactively manage supply, cost, and schedule risks, driving mitigation, escalation, and resolution.
Drive cost reduction and value engineering initiatives through technology, supplier optimization, localization, and manufacturing process improvement.
Build strong supplier and stakeholder relationships to ensure alignment and successful production ramp-up.
Provide procurement and supply chain expertise to strengthen sourcing decisions and NPI execution.

We are seeking a highly skilled and motivated Electrical Validation (EV) Team and System Testing / ATE Team Leader to join our team. This position is crucial in supporting the design, development, and implementation of Automated Test Equipment (ATE) and production test systems.
The Electrical Validation team Lead manages the electrical validation function across our company hardware platforms. This role owns the validation strategy, methodology, lab infrastructure, and execution across all high-speed and control interfaces. The manager ensures robust electrical performance from early prototypes through production release and drives cross-functional alignment between design, SI, firmware, and manufacturing.
The role involves close collaboration with the HW R&D team, Quality, DevOps, and Contract Manufacturing (CM) teams to ensure the delivery of high-quality, reliable products.
This group is part of the HW R&D group.
Key Responsibilities
Define the electrical validation strategy for our company hardware platforms.
Own validation methodology for: High-speed Ethernet (100M-1600G), PCIe Gen1 to Gen5+, SerDes architectures (NRZ/PAM4), Control and management buses (I2C, SPI, RS-232, MDIO, etc.)
Establish structured validation plans aligned with hardware release milestones.
Build and manage a high-performance validation team.
Define lab architecture, including: Equipment selection (oscilloscopes, BERTs, analyzers), Compliance platforms, Automation frameworks, Signal integrity validation environments
Drive early engagement with board design and SI teams to ensure design-for-validation.
Oversee: Compliance (IEEE, PCI-SIG, OIF), Interoperability testing, Stress and margin testing
Lead root cause analysis of electrical failures and systemic issues.
Support NPI, manufacturing bring-up, and yield improvement.
Develop automation and scalable validation methodologies.
Define validation documentation standards and sign-off criteria.
Collaborate with system architecture and software teams to ensure HW-SW integration robustness.
Manage external labs and certification processes where required.
Drive continuous improvement of validation coverage and efficiency.
Lead the full ATE development lifecycle from requirements definition to execution in production, including GUI design and Python scripting.
Develop and maintain boundary scan applications using JTAG Technologies.
Define and maintain test fixtures, including JIGs/Bed-of-Nails, etc., in collaboration with mechanical vendors.
Implement full test traceability systems for production yield and stability monitoring.
Collaborate with R&D and Quality teams to drive product quality and reliability improvements.
Provide onsite support at CM sites, including station setup, installation, training, maintenance, and debugging.
Perform in-depth failure analysis and troubleshooting at the system and component level.
Utilize and maintain a range of test equipment, including:
Work with various communication protocols: TCP/IP, Telnet, SSH, HTTP, SNMP, SFTP, SCP, FTP, RS232, GPIB, I2C, and NI-VISA.
Support testing of embedded systems running on Linux platforms.

This is a high-impact technical leadership role designed for a "star" engineer who can own the entire hardware lifecycle. You will be responsible for stabilizing products from the first prototype through mass production, defining validation strategies, and managing the technical deployment of test stations at global Contract Manufacturers (CMs). You will bridge the gap between R&D, manufacturing, and field reliability to ensure world-class product quality.
Core Responsibilities
Outsourced Station & Vendor Management: Lead the design, setup, and qualification and scale-up of test stations (ICT/JTAG/FT) and debug infrastructure at CM/Outsource partners.
End-to-End Product Stabilization: Own the hardware stabilization process from the first build unit through ramp-up and transition to high-volume production.
Validation & Automation Strategy: Build comprehensive validation plans, review hardware designs for testability (DFT), and integrate automated software tests into production lines.
Advanced System Debugging: Develop hardware debug tools and methodologies to perform deep-dive failure analysis and root cause investigations on systemic issues.
Yield & Data Intelligence: Monitor and optimize yield performance using data analysis techniques to identify trends and failure modes during the NPI lifecycle.
Field & RMA Ownership: Lead technical investigations into field-deployed systems, analyzing diagnostics and telemetry to evaluate RMA claims and provide actionable engineering recommendations.
Cross-Functional Leadership: Collaborate with Mechanical NPI, Test Development, R&D, and manufacturing partners to align test requirements with business needs.
Statistical Process Control (SPC) Implementation: Establish and monitor SPC for critical manufacturing parameters to identify process "drifts" before they result in actual product failures.
Root Cause Corrective Action (RCCA): Lead the formal RCCA process for any manufacturing escapes, ensuring that the "fix" is implemented both in the hardware design and the test software.
Vendor Quality Engineering (VQE): Act as the technical quality lead for CMs and outsourced station builders, defining the "Golden Unit" standards and qualification protocols for all production lines.

We are seeking an exceptional architect to join our architecture team and shape the future of quantum control. We have a unique opportunity to shape the architecture of next-generation quantum computers toward utility-scale quantum computing.
In this role, you will define the logic architecture of the devices that are the heart of the next-generation quantum control platform. Designing the devices, including the pulse processor and their interfaces, requires a deep understanding of quantum computing, the system tradeoffs, and product requirements.
In this role, youll collaborate with Product and with the other members of the architecture team to define the requirements and the roles and responsibilities of each component. Youll identify system-level tradeoffs and identify solution alternatives. Youll work closely with the logic design and compiler teams to define a winning architecture.
Responsibilities: 
Architecture for the next-generation quantum control platform devices, ASIC, and logic components.
Define system-level architecture and features, providing detailed specifications to the various R&D teams.
Collaborate with the product and research teams to transform high-level requirements into architecture and spec definitions, and present tradeoffs.
Work with partners and vendors on requirements, integration architecture and joint development to optimize the product capabilities.

We are looking for an excellent Failure Analysis Practical Engineer to join our team and build our companys state-of-the-art control and orchestration platform. She or he should be a talented and motivated person, who is a real team player, and which can collaborate closely with other engineers from different disciplines and quantum physicists. You will join the company team operating our production site. As part of the job, you will address ongoing product integration activities, resolve quality issues, and support the rest of the team in their production line-related tasks. The work is performed daily in a production floor environment.
The production site is in Migdal Haemek (Flex).
Responsibilities:
Yield monitoring and improvement
Analyze HW failures to a component level in both digital and analog domains.
Identify failure trends
RMA process handling
Failure reports & closure.

We are looking for an excellent design engineer to join our team and build our company's state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface.

We are expanding our algorithm team working on operational defense command-and-control systems and are looking for a Senior Tracking and Data Fusion Algorithm Engineer. This role focuses on the development of real-time multi-target tracking and sensor fusion algorithms deployed in mission-critical environments This is not a pure ML position. It is a model-based tracking and estimation role with operational deployment responsibility.

We are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
Come and take a significant part in verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What you'll be doing:
Join our group, located in Tel Aviv, working on verifying the new generation of high-speed ports.
verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area, and performance
Daily work might involve any or all aspects of chip development: Verification, Design, and Micro-Architecture.
Work closely with Firmware and other groups around the globe.