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we are looking for a Firmware Engineer, Networking, Google Cloud
Responsibilities
Build C/C++ firmware running on embedded processors with limited memory footprints on the SoCs.
Develop tools to update and debug the firmware, enable emulation, chip bringup, and hardware debugging.
Play key roles in Emulation, chip bring up, and SoC deployment, and contribute to all layers of the data center software stack to deploy SoCs to production.
Create code generators to generate C++ code based on hardware specifications.

As a CPU Workload Analysis Researcher within Google Cloud's MSCA organization, you will be integral to developing silicon solutions powering Google's direct-to-consumer products. You will join a Research and Development team focused on analyzing and profiling workloads requirements within the Google Cloud environment. Your role will involve conducting in-depth research on CPU optimization, feature development, and ML usages over compute platforms, contributing to identifying key areas of investment and future opportunities. This role offers a unique opportunity to perform groundbreaking research with a significant impact on both research methodologies and industry products, within the server chip architecture team. Your work will directly influence the next generation of hardware experiences for millions of Google users and Cloud customers.

Responsibilities
Plan and execute detailed analysis of CPU workloads within the Google Cloud infrastructure, analyze trends and map future requirements.
Collaborate closely with architecture and modeling owners to understand design specifications and identify critical scenarios related to CPU performance and efficiency.
Develop and implement custom workload generation tools and methodologies to simulate real-world usage patterns on Google Cloud platforms.
Analyze the impact of machine learning applications on CPU usage, identifying opportunities for optimization and feature enhancements.
Lead the investigation and development of metrics to measure CPU performance and efficiency, presenting findings to stakeholders and contributing to strategic decisions.

In this role, you will be part of a team developing Application-Specific Integrated Circuit (ASIC) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.

You will be responsible for performance analysis for an end-to-end networking stack using your infornation of RDMA based transports.

Responsibilities
Participate in evaluation of future ASIC designs and general architecture for executing Googles data center networking roadmap: off-the-shelf components, vendor co-developments, custom designs, and chiplets.
Collaborate in developing new layer protocols for data center networking.
Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
Define performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.

In this role, you will be part of a team developing Application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.
Responsibilities
Lead an ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
Define high-performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Implement designs in SystemVerilog.

we are looking for a CPU Verification Technical Lead, Google Cloud
Responsibilities
Plan the verification strategy, identify the platform to validate reasoning components.
Define the test plan and strategy with stakeholders, including sign-off and exit criteria.
Plan and execute the verification of Internet Protocols (IPs) using dynamic verification and formal verification.

we are looking for a SoC Verification Technical Lead, Google Cloud
Responsibilities
Plan the verification strategy, identify the platform to validate reasoning components.
Define the test plan and strategy with stakeholders, including sign-off and exit criteria.
Plan and execute the verification of Internet Protocols (IPs) using dynamic verification and formal verification.

we are looking for a Senior CPU Architect, Google Cloud
Responsibilities
Lead architectural definition of CPU core designs, facilitate and make final decisions.
Participate in and influence the building of processor performance analysis infrastructure.
Influence the development of architectural models with varying configurations across product categories.
Perform Performance, Power, Area (PPA) trade-off analysis for architecture and microarchitecture features, communicate analysis results in both qualitative and quantitative fashion to support decisions.

In this role, you will work with system teams and the CPU Architecture team to develop an understanding of the CPU, System on a Chip (SoC), performance metrics, benchmarks/measuring tools, and available optimization knobs. You will define methods and technologies to model CPU performance at different accuracy levels by supporting architectural explorations and decision-making. You will correlate performance projections with measured post-silicon data.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
Responsibilities
Write product or system development code.
Design, develop, test, deploy, maintain, and improve Central Processing Unit (CPU) software modeling and other software tools.
Manage project priorities, deadlines, and deliverables.
Collaborate with hardware and software CPU architecture teams, SOC performance modeling team, and other Google Software teams.

we are looking for a Formal Verification Engineer, Networking, Google Cloud
Responsibilities
Plan the formal verification strategy and create the properties and constraints for digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.

Why Join Us?
We are seeking a highly skilled Technical Project Manager with a strong background in software development and hardware engineering to join our Firewall Core Group. The ideal candidate will have experience managing complex, cross-functional projects that span both hardware and software domains, with a focus on delivering new products and releases for our company's Security Gateways.
Key Responsibilities
Lead cross-functional hardware/software projects, managing new product development and releases for our company's Security Gateways.
Oversee the entire project lifecycle, from planning to execution and delivery.
Manage board design, hardware development, and prototype builds (EVT, DVT, PVT) with contract manufacturers.
Coordinate multiple interfaces, including R&D, QA, PMO, and Product Management.
Drive software release processes, infrastructure changes, and quality improvements.
Ensure smooth project execution by maintaining schedules, mitigating risks, and managing external vendors.

In this role, you will help to develop and maintain emulation infrastructure, tools, and workflow methodologies supporting our Application-specific integrated circuit (ASIC) projects. You will provide emulation infrastructure and methodologies for supporting these projects. You will work with other emulation team members as well as designers, verification engineers, and software teams. You will work with with our external vendors, lab support teams, networking and security, and Electronic Design Automation (EDA) tooling and methodology teams to deliver emulation based prototyping capabilities for our ASIC projects. You will also assist in compiling projects specifying our prototyping platforms, debugging issues in both infrastructure and design, assisting in the hardware and lab bring up, and verification of our ASIC systems.

Responsibilities
Help in maintaining and upgrading emulation infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic Design Automation (EDA) tools, licensing, and job management in Google infrastructure.
Support emulation team members with debugging hardware, tooling, and project specific issues.
Help to bring up external interfaces (e.g., USB, PCIe, Ethernet, etc.) on the emulation platforms, and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.

we are looking for a Senior SOC and IP Design Engineer, Google Cloud
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

we are looking for a Senior SOC RTL Design Engineer, Google Cloud
Responsibilities
Define the SOC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, SystemVerilog), function/performance simulation debug and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power closure and ASIC silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC level verification.
Communicate and work with multi-disciplined and multi-site teams.

We are looking for an experienced Product Manager to lead our SW product development efforts. In this role, you will work cross-functionally to collect inputs from the market (research, customers and internal sources) and guide R&D Software, Firmware, Post processing and DSP teams from conception to launch, ensuring alignment with our business strategy and customer needs. You will be responsible for driving innovation and managing the product lifecycle. The ideal candidate will have a strong development background, experience working in fast evolving startup environments and agility.
This is a hands-on role: youll deep dive into product technical details, focusing mainly in bound activities, work with R&D teams to prioritize, while maintaining our customers needs and meeting their requirements.
Responsibilities:
Lead the strategy, and execution of the software, firmware, post processing and DSP products, ensuring it aligns with overarching business goals.
Serve as the voice of the business, ensuring the product team delivers measurable KPI and meets market and customer demands.
Partner closely with stakeholders in R&D, and business teams to align product development with business objectives.
Collaborate & prioritize with R&D teams to deliver high-quality perception Radar-AI based products.
Partner closely with the customer management to collect inputs from customers and communicate offering to the customers.

Were looking for a talented and driven Integration Team Lead to join our System Engineering group. In this role, youll lead the integration team, working closely with system engineers, V&V, and other R&D functions to bring cutting-edge technologies into reality.
Responsibilities:
Lead and manage the integration team, including task planning, setting priorities and mentoring team members
Be the technical focal point for integration-related activities
Oversee system testing and manage the handover process from Integration to V&V
Lead system bring up activities
Responsible for troubleshooting efforts and resolving problems in a timely manner
Maintain a broad understanding of the entire system and stay up to date with the latest version
Lead by example, motivate, empower and develop team members to reach their full potential
Establish strong working relationships with System Engineering and V&V teams to ensure high-quality delivery
Collaborate closely with multiple cross-functional teams across the organization