לוח משרות דרושים מהנדס חשמל

We are looking for an experienced and outstanding EMC Testing Engineer with the ability to understand complex systems and play a key role in the qualification of our revolutionary technologies.
Responsibilities:
Coordinate and perform hands-on EMC testing on full systems and components
Select, calibrate, and configure the right instrumentation (such as EMI Receiver, cables, antennas, LISN, coupling network, etc.)
Based on collected data and information, determine if specifications, regulations, customers expectations, and acceptance criteria are satisfied - According to automotive standards
Generate formal technical reports, and present conclusions to stakeholders
Conduct failure analysis investigations, diagnose failed components, and identify root causes
Recommend corrective actions (e.g. re-design Schematics, Components, Layout, etc.).

We are developing state-of-the-art LiDAR sensors and advanced perception software for the automotive industry. We are looking for a Senior System Integration Engineer to join our fast‑paced, innovative team responsible for bringing complex LiDAR systems together into a cohesive, high‑performance product. This role is ideal for a hands‑on who thrives on multidisciplinary problem‑solving, system bring‑up, and driving features from early integration through customer delivery.
Responsibilities:
Lead system integration activities across the LiDAR development lifecycle, from initial bring‑up through validation and customer deployment.
Integrate hardware, firmware, software, tools and algorithms into a unified LiDAR system, ensuring seamless functionality across disciplines.
Plan and execute system‑level integration tests, debug complex issues, and drive root‑cause analysis with cross‑functional teams.
Develop and maintain integration workflows, test setups, and automation tools to accelerate development and validation.
Collaborate on requirements refinement, system architecture discussions, and design reviews to ensure integration readiness.
Build Python‑based tools for data analysis, test automation, and rapid prototyping to support integration and characterization activities.
Support development processes aligned with Automotive SPICE and other automotive quality standards.

We are developing state-of-the-art LiDAR sensors and advanced perception software for the automotive industry. We are looking for a Senior System Engineer to join our fast-paced, innovative team developing LiDAR systems for autonomous vehicles. We are looking for a talented hands-on contributor and feature owner, to lead multi-disciplinary systems development and integration, from KPI and data analysis and algorithm prototyping to customer delivery.
Responsibilities
Lead system engineering activities across the LiDAR development lifecycle, from concept through integration and validation.
Develop LiDAR features including algorithms, calibration methods and post-processing solutions.
Perform system-level testing, characterization and modeling.
Contribute to requirements definition, system design, and design reviews with cross-functional teams.
Develop Python- based simulations, prototypes, and automation tools for rapid proof-of-concept and laboratory equipment control.
Lead development processes according to Automotive SPICE standards.

At Lumissil, we are driving innovation in automotive technology, developing solutions that power the next generation of vehicles. We are looking for a Junior Engineer who is eager to learn, grow, and make an impact in a dynamic and innovative environment. This is a unique opportunity to work alongside experienced professionals, gain hands-on experience, and contribute to projects at the forefront of automotive electronics. If you are passionate about technology, curious to explore new challenges, and excited to make a real difference, Lumissil is the place to develop your skills, innovate, and grow your career. Why join us?
* Work on cutting-edge automotive projects
* Learn from a talented and supportive team
* Gain exposure to real-world automotive challenges
* Grow your career in a collaborative and inspiring environment If you’re ready to take the next step in your career and be part of something meaningful, we’d love to meet you! About The Position: As a Junior ASIC Design Engineer at Lumissil, you will take part in the full lifecycle of advanced chips that power the next generation of vehicles. This is a hands-on, growth-oriented role where you’ll work closely with experienced ASIC engineers, gain exposure to real silicon, and build a strong foundation in chip design and verification. In this role, you will:
* Be part of a professional ASIC team working on cutting-edge automotive solutions
* Support and learn from real emulation platforms used in production-grade designs
* Contribute to RTL implementation and gain practical experience in design flows
* Assist with verification and backend (BE) activities, learning industry best practices
* Participate in silicon bring-up, seeing your work come to life on real hardware This position is ideal for curious engineers who want to learn fast, take ownership, and grow into a key contributor in the world of automotive semiconductor design.

We push the boundaries of technology, developing innovative DFT solutions that drive industry-leading programmability, scalability, and performance. Our team operates in a hybrid model, with three days a week in the office in Midtown Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation.

Your Impact

As an Experienced DFT Engineer, you will:

Own and drive DFT execution across the full product lifecycle, from pre-silicon design through post-silicon debug and production qualification.

Define and align DFT architecture and strategy in close collaboration with chip architects, design, and verification teams.

Oversee and contribute hands-on to the implementation of DFT features, including ATPG, scan insertion and compression, and memory BIST.

Lead silicon debug activities and root-cause analysis, driving corrective actions to improve yield, reliability, and test quality.

Establish, standardize, and evolve DFT methodologies and best practices across projects.

As a key member of the team, you will be responsible for developing a state-of-the-art functional simulator for the family of devices. This simulator is a critical product that streamlines the development process and significantly reduces time-to-market.

In this role, you will:
Design, implement, and validate components of the behavioral model for SiliconOne devices
Collaborate with ASIC Architecture, Software, and Hardware teams to ensure alignment and seamless integration
Apply engineering best practices for code quality, performance, testing, and documentation
Troubleshoot and resolve complex technical issues
Contribute to defining best practices and methodologies for model development, validation, and integration

Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies

You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.

We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

Collaborate closely with the ASIC Architecture team to implement an accurate and efficient software model based on the architecture specifications.

Partner with both Software and Hardware design teams, providing support as they use the simulator as the golden reference for hardware implementation.

Ensure the simulator meets the highest standards of performance, reliability, and usability.

Contribute to defining best practices and methodologies for model development, validation, and integration. 

You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

You will be leveraging your backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.

As the Physical Design Group Leader, you will provide strategic and technical leadership to a team of engineers, guiding them through the entire chip design lifecycle. You will be responsible for the group's output, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

* Manage and build a world class team managing ASIC design, micro-arch, SDC constraints and integration efforts of the project.
* Translate high level goals to measurable plans and milestones. Lead RTL design, quality checks, and manage schedule for on-time delivery of key IPs.
* Work with verification and physical design teams to achieve high quality design.
* Interface with IP teams and manage schedule and delivery of IPs for successful TO.
* Guide and mentor junior engineers as required.
* Hire and retain tier one engineers and foster teamwork with cross functional collaboration.
* Build a culture of execution excellence coupled with innovation.
* Build a team of hard-working and passionate leaders as we scale.
* Maintain close interactions with NPI, Packaging, DFT, Architecture teams.
* Own power, performance and area optimization of design.