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25/08/2025
Location: Ra'anana and Yokne`am
Job Type: Full Time
Our Networking team in Israel is looking for an expert system/board designer to join the Hardware NVLINK Group. The team leads the development of GPU networking infrastructure for our company next-generation servers focusing on accelerated performance while enabling optimized end to end GPU connectivity.
our company's NVLINK HW team designs innovative end-to-end connectivity solutions for GPU servers. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. Our products are focused on delivering the most optimized power - performance communication solutions for industries like AI, ML, Cloud, Media and Entertainment as well as any other industry that can benefit from our Datastream acceleration.
What you'll be doing:
Lead Pioneering Switch System design from concept to mass production
Collaborate and integrate with all HW project fields: Board Design, Mechanics, Thermal, PCB Layout, Production, Software/Firmware, RTL and more
Project decision maker - Technical focal point
The position consists of product specification definitions, electrical schematics, component selection, layout guidance, hands-on testing in a lab environment, accompanying production and qualification processes.
Requirements:
B.Sc. in Electrical Engineering (or equivalent experience)
12+ years as a board designer, experience in complex HW projects execution
Proven experience in leading multi-disciplinary projects
Hands-on lab skills
Multi layer PCB design knowledge
Experience in high current power delivery design
Comprehensive understanding of RTL implementations (CPLD/FPGA)
Personal: Project management skills, independent, excellent interpersonal relationship
Ways to stand out from the crowd:
Experience in data-center switches products design for high volume manufacturing
Proven knowledge in high speed design (25Gb/s and above)
Experience in HW team lead
Knowledge in advanced PCB technology
Experience in leading customers conversations, understanding product requirements.
This position is open to all candidates.
 
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25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Team lead to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
Leading and mentoring Physical Design-Backend team.
Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Take part in project definition towards POR, close interaction with other domains such as FE, ARCH.
Requirements:
B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering.
2+ years of managerial experience.
6+ overall years of experience in physical design.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8317777
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25/08/2025
Job Type: Full Time
we are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What you will be doing:
Join Beer-Sheva/Tel-Aviv group, working on verification/design in the field of encryption accelerators.
Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.
Daily work will involve verification and might involve any or all aspects of chip development including design and micro-architecture.
Work closely with firmware and other groups around the globe.
Work mode: Hybrid home-office.
Requirements:
B.SC./M.SC. or equivalent experience in Electrical Engineering/Communication Engineering/Computer Engineering
5+ years of validated experience in RTL Frontend ASIC Verification (Chip Design)
High Level of English
Ways to stand out from the crowd:
Experience in RTL Frontend ASIC Verification
Knowledge in Specman
Knowledge in Verilog.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317773
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25/08/2025
Location: Yokne`am
Job Type: Full Time
our company's Networking unit has continuously reinvented itself over two decades. Our high-speed products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. Today, we are increasingly known as the place for getting End-to-End High-Speed Ethernet and InfiniBand Solutions. We're looking to grow our company and build our teams with smart people who can join us at the forefront of technological advancement. our company'sIC Packaging design team is looking for a Senior IC Packaging Design Engineer to join our package team. and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for our company's products.
What you'll be doing:
As part of a IC Packaging design team, you will collaborate to implement high speed and PDN design for ASIC packages.
Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using Cadence APD (Allegro) or SiP tools.
Optimize package pin out incorporating system level trade-offs of pins assignment.
Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations.
In close co-operation with the SI/PI/HW design teams and product teams
Planning, ensuring stakeholder management and leading projects from start to finish.
Requirements:
B.Sc. Electrical Engineering or an Electrical Practical Engineer certificate or equivalent experience
5+ years hands-on in Package/PCB Layout and outing experience; including high speed design signal integrity practices.
Experience in substrate layout of wire bond and flip chip packages, preferred
Knowledge in substrates or board manufacturing process
Significant background with Cadence Virtuoso and APD (Allegro) or SiP and/or other PCB layout tools
Ways to stand out in the crowd:
Knowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools
Familiarity with Skill language (Cadence) and basic parsing abilities (Python/Perl/Shell-scripting).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8317769
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team.As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What You'll Be Doing:
Work in a design/verification team which develops core units within the Switch silicon.
Micro-architecture of dynamic verification environments planning for units and modules.
Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
5+ years of experience in RTL design/dynamic verification.
Knowledge in network protocols and/or HPC and distributed calculations - advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8317762
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are now looking for a best-in-class Senior Chip Design Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer at our company's GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry our companys GPU Super-Chip.
What youll be doing:
Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU
Integrations and Full-Chip models
Verification of chip blocks/entities according to specifications under challenging constraints
Your daily work will involve all aspects of Design Verification : Planning, Coding, Coverage and Integration.
Requirements:
5+ years of experience in RTL design verification.
B.Sc. in Electrical Engineering or Computer Engineering.
A team player with good communication and interpersonal skills.
Ways to stand out from the crowd:
Knowledge in Specman and System-Verilog UVM
Knowledge in Networking.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8317758
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Yokne`am
Job Type: Full Time
our company's Analog Layout design team is looking for a Senior Analog Layout Design Engineer someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed mixed-signal circuit designs. our company has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI the next era of computing. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence.
What you'll be doing:
Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools
You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
Job duties will include floor planning, custom layout and verifying against design rules and schematics, EM/IR analysis.
Requirements:
You will have a minimum of 8 years of relevant mask analog layout experience
An Electronics Practical Engineer certificate or a B.Sc. in Electrical Engineering
Proven understanding of analog circuit layout concepts in submicron CMOS technologies - such as Operational Amplifiers and ADC/DACs.
You are an expert with Cadence custom circuit design tools - particularly Virtuoso
Experience running and debugging DRC and LVS with verification tools such as ICV, Calibre
You can work effectively in a team, good interpersonal skills, enthusiasm and positive energy.
Ways to stand out in the crowd:
Proficiency in scripting languages like python, skill
Knowledge of DRC and LVS checking flows, EM/IR tools, ability to customize DRC and LVS decks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8317751
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group.
As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
Requirements:
B.Sc. in Electrical Engineering or Computer Engineering.
4+ years of experience in RTL design or RTL verification.
Previous experience in networking - an advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8317746
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Perform advanced Static Timing Analysis (STA) for NiC and SoC projects.
Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.
Requirements:
B.SC./ M.SC. in Electrical Engineering.
At least 6+ years of hands-on STA experience.
Experience in Prime Time and signoff methodologies.
Excellent leadership capabilities.
Ways to stand out from the crowd:
Knowledge in physical design flows and methodologies (Synthesis, PNR, DFT designs).
Trong background of Prime time tool.
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8317740
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
At our company, you will be joining a team of dedicated Physical Design Engineers who excel in developing high-speed communication devices. Our team is recognized for delivering highly efficient and low-latency products. Join us to contribute to groundbreaking chips in a professional environment. This is an ambitious role where you will compete and excel in a collaborative environment.
You will be empowered to determine and successfully implement world-class solutions. Join us to be part of a team where your work will be flawless, and your career will thrive in our encouraging and inclusive culture. our company has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!
What you'll be doing:
Learn and implement the complete place & route flow, using sophisticated software tools.
Be responsible for the physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed to and work on a variety of exciting designs, including high cell count and high frequency blocks, resolving timing and congestion problems.
Engage in the complete design chip development flow (RTL2GDS) including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering.
Knowledge in physical design flows and methodologies (PNR, STA, DRC, IR) - Advantage.
Deep understanding of all aspects of physical construction and integration.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
2-3 years of relevant experience.
Proven ability to work as a great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317729
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דיווח על תוכן לא הולם או מפלה
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שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: More than one
Job Type: Full Time
we are looking for best-in-class STA Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part inflows development.
Requirements:
B.SC. in Electrical Engineering/Computer Engineering.
2-3 years of experience as STA engineer.
Ability to quickly adapt to new technology and go deep into new areas
Strong communication skills
Great teammate.
Drive new solutions based on any issues that arise
Ways to Stand Out From the Crowd:
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317724
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Yokne`am
Job Type: Full Time
We are looking for a skilled Test Development Engineer to join our diverse team focused on developing the test framework and tools for our company's networking and Interconnect products. As a technical focal point, you will collaborate across multiple teams, taking ownership of test suite development, specifications, tools, and automation. You will be a resource in driving innovation and developing scalable, reliable, and high-performance Software that enables the next generation of interconnect technologies. If youre passionate about code development, automation, innovation in testing programs, and becoming a key technical contributor, wed love to have you on board!
What Youll Be Doing:
Collaborate with multi-functional teams including, operation, thermal, mechanical, and hardware to define and refine test requirements
Take the lead in identifying and resolving hardware and software failures, guiding the team to pinpoint root causes
Lead all aspects of deployment of test solutions to production environments and ensure smooth integration and support when required
Develop comprehensive testing software and automation tools for hardware releases
Act as the go-to guide for developing sophisticated test systems, provide mentoring and guidance to other experts and technical staff.
Requirements:
Bachelor's or masters degree (or equivalent experience) in Computer Science, Electrical Engineering, Computer Engineering, or a related technical field.
8+ years of test development experience, with proven ability to lead technical projects.
Proficiency in one or more programming languages such as Python, Java, C#, C++
Strong expertise in test automation frameworks and methodologies.
Excellent problem-solving and analytical skills address sophisticated technical issues
Ability to collaborate across teams, demonstrating initiative and technical ownership of projects
Ways To Stand Out From The Crowd:
Hands-on experience in distributed systems development, and code testing for large-scale hardware components involving multiple critical components
Experience with electronic platforms, including micro-controllers, DSPs, and embedded firmware
Knowledge of multiple programming languages and environments, Linux, and other relevant platforms
Technical management of a team or leading software development projects.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317720
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.
As a Senior Chip Design Verification Engineer in the DFT team at our company, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
BSc. in Electrical Engineering or Computer engineering, or equivalent experience.
5+ years of practical verification experience.
Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).
Experience with Specman is a plus.
Good understanding of RTL design (Verilog).
Strong debugging, problem solving and analytical skills.
Excellent communication and social skills.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317717
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דיווח על תוכן לא הולם או מפלה
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תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Responsible for chip floorplan and pins placement
Running, debugging and approve Physical verification flows across multiple projects
Perform physical layout planning and optimization.
Requirements:
B.SC./ M.SC. in Electrical Engineering
At least 5+ years of hands-on layout design experience
Strong background of Physical Design Verification methodology LVS/DRC
Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc..)
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317712
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Job Type: Full Time
our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's an outstanding legacy of innovation that's fueled by great technologyand outstanding people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an worker , youll be immersed in a diverse, encouraging environment where everyone is motivated to do their best work. Come join the team and see how you can make a lasting impact on the world.
we are seeking a network security research architect who is interested in a chance to define, research, and implement next-generation security features for data centers networks. The position will take on a lead role, working with teams with varied strengths across our company and with external partners to research security requirements for networking products.
What you'll be doing:
Lead, research, design, develop, and implement solutions for securing networks and identifying threats and incidents in the network.
Apply innovative security primitives to enable secure platforms.
Collaborate across external and internal hardware and software research teams.
Architectural modeling, validation, microarchitectural definition, following standards bodies, and developing proof-of-concepts secure platforms.
Research network telemetry for supporting secure networking platforms confidentiality, integrity, and availability.
Requirements:
MSc or PhD in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience.
At least 5 years of experience.
Background in data center network protocols, threat modeling, and network security, as well as common mitigation techniques.
Programming and debugging fundamentals across languages such as Python, and C/C++.
Strong communication skills and a genuine passion for working together as a team are vital.
Ways to stand out from the crowd:
Proven security research experience and publications in top security conferences.
Experience with high-scale deployment challenges, RDMA networking, and machine learning.
Architectural background in hardware and software systems codesign.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317707
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