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We are now looking for Chip-Design Student for the Networking Silicon group.

As a chip design Engineer Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips.

In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops network silicon IP units specializing in data path, encoding, error correction and much more.

Build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

Youll serve as a team lead for a Python stack.
The work will primarily be in Python, but familiarity with Java is a big plus. You may also want to bring in new languages and frameworks as you see fit (Weve deployed Go, Kotlin, Node and other languages as needed).
Youll split your time between mentoring engineers and doing hands-on work.
Youll work on new designs and refactor old systems to meet new business needs and scale. Youll help come up with the technical roadmap and influence new features.
Responsibilities:
Serve as a team lead for a split Pythonstack.
Mentor and train junior developers.
Design and implement new Python systems, going from concept, design, execution to production deployment.
Work with the DevOps team to get code to production and set up monitoring and alerting as needed.
Partner with the operations team to set up to understand service issues and help set the development roadmap to fix.
Proactively participate in resolving ongoing incidents.
Location- Hod HaSharon.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies, and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be part of state of the art Design for Test/ATPG flows and implementation.

Take ATPG ownership on different DFT aspects of a project, Arch & planning, pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

We are now looking for a Chip Design Student for the NVIDIA SOC team.

As a Chip Design Student at NVIDIA, you'll join a group of passionate engineers and students to design and implement the next generation state of the art DPU SOC chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency.

What you'll be doing:

Work in a combined design and verification team which develops some of the SOC silicon core units

Build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to performance.

Partner closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

We are looking for best-in-class Physical Design Manager to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

Leading and mentoring Physical Design-Backend team.

Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

Take part in project definition towards POR, close interaction with other domains such as FE, ARCH.

As we continue to expand globally, we are seeking a dynamic and experienced Director of Global Sales Development (SDR) to drive sales achievements to new heights. If you're skilled at driving growth and leading high-performing global sales development teams to great results, come join us and be the leading force of our SDR on a worldwide scale.
This role is reporting to the EVP Global Revenue.
Position Overview:
The Director of Global Sales Development will be responsible for leading our SDR teams across various regions worldwide. This role will play a pivotal part in driving revenue growth by implementing pipeline generation initiatives, optimizing processes, and nurturing a high-performing and winning sales development culture. The ideal candidate will possess a strong background in sales leadership, a deep understanding of Sales Development practices and excellence, understanding of SaaS business, and a proven track record of success in building and scaling sales development teams in a global environment.
What you'll do:
Leadership and Team Management:
Lead, mentor, and motivate a geographically dispersed team of sales development representatives (SDRs) to achieve and exceed pipeline targets.
Provide ongoing coaching, training, and development opportunities to enhance the team's skills and performance.
Foster a collaborative and results-driven culture within the SDR teams.
Strategy and Planning:
Develop and execute a comprehensive global sales development strategy aligned with company objectives and revenue targets.
Collaborate with cross-functional teams, including marketing, product, partners and sales, to optimize lead generation and qualification processes and maximize pipeline efficiency.
Identify new market opportunities and implement innovative approaches to drive revenue growth and market expansion.
Process Optimization and Enablement:
Create required training programs and certification to ensure constant education and improvements within the teams
Create feedback mechanisms between the sales development teams including knowledge sharing and lessons learned to improve performance.Analyze sales and sales development data and metrics to identify areas for improvement and implement data-driven strategies to optimize performance.
Refine processes through a data-driven lens, harnessing cutting-edge technologies and analytics to ensure precision, efficiency, and consistently impactful sales outcomes.
Performance Management:
Define key performance indicators (KPIs) and metrics to measure the effectiveness of the sales development team.
Monitor team performance, pipeline metrics, and conversion rates to identify trends and areas for improvement.
Provide regular reporting and insights to senior management on sales development performance, trends, and forecasts.
Collaboration and Communication:
Foster strong cross-functional relationships with sales, marketing, customer success, and other departments to ensure alignment and collaboration.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

We are looking for a talented Senior HPC and AI Networking Performance Research and Analysis Engineer to join our Performance group.

The ideal candidate will profile and analyze AI workloads on large GPUs and CPUs scale clusters for distributed Deep Learning LLM training focusing at the collectives communication and networking.

You will work and interact with many types of HW and platforms such as HCAs, Switches, CPUs, GPUs, and Systems.

You will experience with and develop performance analysis tools and methodologies to dive deeply into the details, understand performance expectation, limitations, and bottlenecks.

What you'll be doing:

Experience and research AI workloads and DL models specifically tailored for large-scale deep learning LLM training on our supercomputers with a focus on High-performance networking.

Benchmarking, Profiling, and Analyzing the performance to find bottlenecks and identify areas of improvement and optimizations, with a strong emphasis on networking aspects.

Implement performance analysis tools.

Collaborating with many teams from HW to SW to provide performance analysis insights.

Define performance test planning , set performance expectations for new technologies and solutions, and work to reach the performance targets limits.

We are looking for an experienced, highly motivated software engineer to join our Chip Design Technologies team. As a member of this team, you will be exposed to the world of EDA software development. This field merges electrical and software engineering to create software tools and solutions used to expedite the design and validation of the next generation of product designs. In our company, these products are aimed at advanced data centers, and power AI revolution across the world.

What you'll be doing:

Leading the charge in developing software tools and solutions, crucial for creating cutting-edge design validation methodologies for us.

Enhancing and refining our suite of in-house tools, used in design validation flow.

Collaborating with designers, verification specialists to ensure your solutions seamlessly integrate into our design validation process.

We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work in a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.