Plan the verification of digital design blocks by understanding the design specification, and interacting with design engineers to identify important verification scenarios.
Lead a team of chip engineers. Plan tasks, allocate people, and hold verification design/code reviews.
Perform code development for critical verification features and capabilities.
Work with system, software, design, and physical implementation stakeholders to make technical decisions and represent project status throughout the development process.
Lead design verification efforts and work with external and internal partners.
Requirements: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
5 years of experience in technical leadership, leading project teams, or setting technical direction.
Experience in managing Design Verification (DV) team.
Experience in verification methodologies, tools, and techniques.
Experience creating chip or subsystem design verification strategies and plans.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science, or a related field.
Experience with verification techniques, and full verification life cycle.
Experience in verification of IP/SoC/ASIC.
Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
Experience with ARM instruction set architecture or processor microarchitecture.
Experience in leading teams and delivering projects.
This position is open to all candidates.