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Senior Formal Verification engineer - Networking (6034) A unique opportunity to take part in building an R&D team for a global company.

We are expanding our System Validation Group and invite you to explore Space with us!
Outstanding opportunity to be part of a super-cutting-edge team working on systems above and beyond the globe in our company.
What you will be doing​
Writing system validation Test plans , Design and develop Test programs to validated embedded system features and performance.
Conducting System Validation Test cycles to verify systems based on HW (analog and Digital), RF, SW, FW
Experience with Python or C programing, Git or other programming languages & source control.
Strong technical troubleshooting.
Develop tools and utilities for Lab & field testing, feature analysis
High debug capabilities when work with the Software, systems, HW teams on complex issues.
Ability to move fast and decisiveness.
Building development environment.
Designing automate tests.
E2E ownership product from kickoff to production.

Things work differently in space. our company develop New-Space hardware and software that work flawlessly in harsh space conditions. Our technology is already deployed in space and used in many satellites and more than 50 space missions across the solar system - with zero failures.
We are expanding our Design Verification team, and invite you to explore Space with us! The job includes taking a viable role in the VLSI verification tasks of our company line of products.
What you will be doing
Plan & implement UVM verification environments
Interact with Architecture, Design, SW and Validation teams
Define new DV methodologies and improve existing ones
Work on both ASIC and FPGA Space system project.

We are looking for a highly skilled Integration & Validation Engineer to join our R&D

team and take part in developing our ultra-deep-tech innovative products and solutions for wireless

energy transfer systems for autonomous robotics. The team deals with multidisciplinary R&D tasks for

developing in-house solutions and platforms. Come work with us in a dynamic working environment

with high responsibility, joining us, youll have the chance to develop unique products from scratch to

mass production.

Key Responsibilities:

● Plan, execute and analyze end-to-end systems/products including hardware & embedded

integration tests.

● Designing and building test setups from the first-level design, testing and studying E2E system

operation at nominal and corner scenarios.

● Be a major part of product HW design, including characterization, implementation, and testing.

● Knowledge of all systems, use-cases, installations, and interfaces.

● Close work with HW/Mechanical/Embedded/ASIC and production teams.

● Reliability and compatibility tests according to regulatory requirements.

We are hiring an FPGA Verification engineer to ensure the quality and correctness of the most complex FPGA components. The role involves building modern self- checking testbenches, writing verification plans, and achieving full coverage of logic implemented in VHDL/Verilog. You will work closely with FPGA developers and system engineers to ensure our products are robust and fully reliable.
Responsibilities:
* Define and build verification environments from scratch at both Block and Top levels.
* Write SystemVerilog testbenches using advanced methodologies (UVM - strong advantage).
* Perform simulations and analyze results (Directed & Random testing
* Define and track coverage metrics (Code & Functional) to ensure verification goals are met.
* Work with leading simulation tools such as ModelSim, Questa, or Vivado.

We are seeking a full-time, on-site Validation engineer to lead automation and manual testing efforts across our product line. This role encompasses validation, functional verification, and Quality Assurance activities for medical devices integrated with Windows, Android, IOS, and web applications. The successful candidate will also provide technical guidance to our offshore validation team in India.

We are in the early stages of a new project and looking for a talented Senior engineer to take on a key role, leading Verification efforts of major parts of our ASIC - from scratch
Roles and responsibilities
Take ownership of Verification for large ASIC clusters.
Plan, build, and execute the Verification environment end-to-end.
Mentor and guide juniors/students.

we are looking for a Senior Verification Engineer.
Your Impact
Develop advanced verification environments using SystemVerilog and UVM
Write, run, and debug testbenches to ensure complete functional coverage
Drive pre-silicon and in-lab debug activities to resolve complex issues
Collaborate with RTL, architecture, and physical design teams to achieve design closure
Support methodology development, scripting, and automation to enhance productivity
Contribute to the success, powering the next generation of Internet infrastructure

we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of our company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.
The Verification engineer we look for will be a highly talented and motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists.
Responsibilities:
Practicing the full range of verification aspects
Creating a verification environment from scratch (drivers, monitors, coverage...)
VIP (DDR/PCIe/AXI) integration
Defining verification sequences via a complex control-flow constraint set
System understanding of a full-stack product with strong HW-SW coupling
Reference model integration
Test plan definition
Defining verification flows and creating the proper infrastructure to support it.

we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. At the core of our company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
We are seeking a highly skilled Hands-On Engineer to join our Quantum Integration Team, ensuring seamless integration of multi-layered systems. This role requires close collaboration with cross-functional teams to debug, validate, and integrate complex interfaces while ensuring end-to-end functionality.
Key Responsibilities:
Integration of multi-disciplinary systems, ensuring smooth operation across different layers.
Debug and troubleshoot issues arising in the integration process.
Develop integration and validation tools.
Collaborate with architecture, logic design, verification, compiler, and embedded teams.

we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. At the core of our company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
The hardware development team spans two global sites - one in Tel Aviv and one in Copenhagen. The team is responsible for all hardware within our company spanning from room-temperature control hardware to our cryogenic QPU carriers.
We are looking for a Validation Engineer or Physicist to plan and execute validation activities for cryogenic hardware, with a strong focus on electrical and RF performance. In this role, you will work closely with system architecture, RF, mechanical, and hands-on engineering functions to translate design intent and requirements into validated, production-ready solutions. The position combines structured test planning, shared technical risk ownership, and hands-on execution in laboratory and cryogenic environments.
Key Responsibilities
Define validation strategies, test plans, and acceptance criteria aligned with system and customer requirements.
Contribute to customer-facing compliance matrices and quality planning.
Take ownership of Factory Acceptance Testing (FAT) and Site Acceptance Testing (SAT).
Report on test results and provide clear, actionable feedback to development teams and customers.
Design, build, and maintain electrical and RF test setups, fixtures, and measurements.
Contribute to technical risk analysis at the project level, defining validation and mitigation activities in collaboration with the project team.
Plan and execute proof-of-concept (POC) validation activities, with emphasis on electrical and RF performance.
Perform cryogenic testing, including preparation, operation, data collection, and analysis.

we are the global leader in control systems for quantum computing, providing the hardware and software tools researchers and businesses need in order to build quantum computers from the ground up. We are pushing the envelope in a field on the verge of exponential growth, bringing about opportunities like those made possible with the invention of classical computing 50 years ago. We are assembling the strongest team of professionals in the world with the goal of revolutionizing how quantum computers are built and controlled while accelerating their arrival. Come join a multi-disciplinary, world-class team and work on a new class of problems at the cutting edge of technology, science, and business.
We are seeking for a passionate and skilled Validation Engineer to join our core R&D team. As a Validation Engineer, you'll play a critical role in ensuring the quality, reliability, and performance of our state-of-the-art quantum control systems. You will design, develop, and execute validation plans for complex hardware-software systems, contributing directly to the advancement of quantum technologies.
This role is ideal for engineers with good programming skills, a strong technical culture, and a passion for working at the intersection of software, hardware, and quantum science.
Key Responsibilities:
Design and Implement Validation Methods: Design, implement and execute comprehensive validation test plans for our quantum control platforms and solutions
Develop Automated Tests and Automation Frameworks: Develop automated testing infrastructures to streamline validation processes and implement system tests based on the defined test plans
Data Analysis: Collect, interpret, and document data from system tests/experiments to assess system performance and identify areas for improvement
System Debugging & Troubleshooting: Identify, reproduce, and analyze issues across system components with other engineering teams
Collaborate Across Teams: Collaborate closely with R&D and product teams to define test coverage and quality acceptance criteria
Release & Quality Assurance Process: Participate in regression testing and CI/CD for new feature rollouts and product releases
Maintain and Improve Test Setups: Oversee the setup, calibration, and enhancement of test equipment and environments.

we are the global leader in control systems for quantum computing, a field on the verge of exponential growth, bringing about opportunities like those made possible with the invention of classical computing 50 years ago.
We are assembling the strongest team of professionals in the world with the goal of revolutionizing how quantum computers are built and controlled and accelerating their arrival. we are backed by top-tier investors such as Battery Ventures, TLV Partners, Red Dot Capital, and Avigdor Willenzs investment group.
We are looking for a super talented engineer to join our team and build our company's architectural model of a quantum control system.
We are looking for a motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Working in all fronts - high-level architectural solutions to low-level design constraints
Working across multiple teams and methodologies
Designing a complex IP to be used both internally by various R&D teams and externally for our customers as a stand-alone product
Designing a flexible and integration-able model to allow referencing from various programming languages (UVM, Java, Python, Kotlin and C++) as well as coupling it to a behavioral quantum simulator.

Were building the next Gen. AI Factory, at a leading AI Infrastructure technology company. Our products sit at the core of rack-scale computing and define the performance and scale of AI systems.
If youre driven by solving problems, some dont yet have names, this is where you want to be.
The role Includes:
Develop ASIC verification environment for full chip, sub-cluster and unit levels. Responsibility for generation and execution of verification plan for challenging digital blocks/chip Development of System Verilog, UVM based protocol/traffic generators, monitors, checkers and coverage, Learn and work with great teammates