לוח משרות דרושים חשמל ואלקטרוניקה עבודה היברידית, לחיפוש זה נמצאו 45 משרות

We are looking for an experienced R&D Program Manager to drive execution across multiple engineering teams, ensuring predictable delivery, strong Agile discipline, and smooth product releases.
In this role, you will own cross-team planning, dependency management, sprint execution oversight, release coordination, and delivery metrics. You will work closely with Engineering, Product, Production Support, and DevOps to ensure alignment and execution across R&D.
A key part of this role is leveraging AI and automation to transform how we run engineering programs. You will design and implement AI-driven workflows and agents to automate reporting, track dependencies, monitor risks, and generate delivery insights-reducing manual coordination work and improving decision-making speed.
What youll do:
Manage cross-team delivery plans, dependencies, and risks
Oversee sprint scope, execution, and Agile processes across teams
Own release planning and coordination from readiness to delivery
Track and report key R&D metrics
Build AI-powered automations for reporting, tracking, and risk detection
Improve delivery efficiency through tooling and process optimization

we are looking for a AI/ML Applied Researcher.
As AI Applied Scientist, youll be at the intersection of advanced technology and meaningful impact with clear business cases. You will have access to real-time (RT) big data from multiple Sensors & Data sources, and a chance to discover, explore, research, and develop cutting-edge solutions that directly impact industrial manufacturers around the globe. As part of the Applied AI/ML Science team, you will have the opportunity to continuously grow and learn while building and deploying advanced models directly into our products, and stay at the forefront of the technologies in the world, witnessing firsthand their impact on our customers.
A Day In Your Life:
Own the algorithm lifecycle from problem definition and data analysis to prototyping and delivering production-ready models.
Research, design, and build anomaly classification, predictive, insights, recommendations, and other types of models from various data sources, including sensor time-series data, textual data, images, and more.
You will Ensemble multi-modalities by exploiting and enriching the most from our data collections platform and feature extraction and store phases, using classic statistical methods, deep learning, Transformers, Graphs, Foundations Modules (as TSFM, Graph Transformer, TGNN), and any available technology to extract recommendations for taking real-world, life-changing actions.
Engage with customers and collaborate with our product team to develop innovative solutions utilizing new types of data.
Work with cloud-based big data platforms for training, distributed processing & experiments tracking (e.g., Metaflow, Grafana, Outerbounds, Databricks).
Partnering and contributing to modern technologies: LLMs and agents (GPT, Claude, Gemini), defining & building Gurdrails, reasoning chain as function call, planning, ML-based vectorization and embeddings, and stream analysis.
As part of our hybrid working policy, you will be expected to work from the office at least twice weekly, which includes at least one day in Haifa.

We are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (Hybrid model)
Responsibilities:
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

Required Software Post Silicon Validation Lead
Job Description
Meet The Team
Welcome to the Post-Silicon Validation Team at Silicon One , where startup energy meets the scale of a global technology leader.
As part of Silicon One Group, we help deliver the silicon, optics, and hardware platforms behind our core Switching, Routing, and Wireless products used by enterprises, service providers, public sector, and non-profit organizations worldwide.
Our team works side by side with verification engineers, designers, and cross-functional partners to validate complex ASICs across their full lifecycle and ensure outstanding product quality.
At the center of this innovation is Silicon One, the industrys only unified silicon architecture, powering platforms from Top-of-Rack switches to web-scale data centers and critical AI infrastructure.
Your Impact
Lead validation work for complex networking ASICs, from first silicon bring-up to production.
Manage and support a small validation team, and guide daily technical work.
Own the validation plan for features, performance, power, and reliability.
Find and solve issues across silicon, firmware, drivers, and system software.
Work with architecture, SDK, and firmware teams to improve product quality, stability, and test coverage.
KEY RESPONSIBILITIES:
Lead post-silicon validation and debug for networking ASIC projects.
Manage tasks and technical direction for a small validation team.
Build and run validation plans for function, performance, power, and reliability.
Drive silicon bring-up, stepping checks, and production readiness.
Develop validation tools and automation using C/C++ and Python.
Run stress and long tests to find hidden silicon problems.
Debug hardware and software issues in the lab.
Validate networking features and interfaces (for example Ethernet, PCIe, SerDes, DDR, SPI, I2C, UART).
Add tests to regression flows and track progress until closure.
Document results, issues, and recommended fixes clearly.

Required PHY System Technical Leader
Job Description
Join the PHY system team at Silicon One, a pivotal part of our silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.
What Youll Do:
Youll be part of the group driving next-generation network devices-Silicon One-within a startup-like atmosphere inside a well-established, leading corporation.
Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

Required ASIC Design Engineering Technical Leader
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
Silicon One is transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

We are seeking Senior Software Program Manager
Meet the Team
Silicon One leads ASIC design for next-generation network devices, shaping the future of networking in the AI/ML era with industry-leading silicon solutions. Our technology delivers high speed, programmability, power efficiency, and scalability while supporting Open Standards, Open Networking, and cloud data centers.
As part of the Silicon One team, you will work alongside talented engineers and innovative customers to build world-class products. The team spearheads SDK development for multiple generations of our ASIC families, enabling advanced networking capabilities across diverse platforms.
Your Impact:
You will lead sophisticated, multi-functional programs spanning silicon development, firmware, and system delivery, driving execution from initial concept through production. You will collaborate with engineering and operations teams to deliver high-quality solutions, craft effective processes, and ensure strategic alignment across the organization.
Specific Responsibilities include:
Driving end-to-end program execution for the Silicon One ASIC software ecosystem, including integration with industry-leading network operating systems.
Serving as a key interface for New Product Introduction (NPI) programs for next-generation Silicon One devices.
Leading cross-functional alignment across engineering teams in a globally distributed environment.
Owning program schedules, milestones, dependencies, risk management, and executive communications.
Partnering with software engineering leaders to ensure tight hardware/software co-development and integration.
Liaising with our internal business units and customers to collect requirements and manage prioritization across competing stakeholder interests.
Driving accountability for outcomes while working through influence in environments with high ambiguity, rapid change, and ambitious timelines.

DFT Intern - ASIC Student - Israel - ETR
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
Who We Are
The Design for Test (DFT) team is part of the design group, which focuses on logic design, RTL development, and running verification tests. Their main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing. The goal is to detect potential manufacturing defects with maximum efficiency and filter out faulty units before they reach the market.
The ideal candidate is friendly, social, easygoing, with a good sense of humor, and has the ability to learn independently. They should be located in central\north Israel (Tel-Aviv\Caesarea). Strong independent work skills and job stability are important.
What You'll Do
Work in a small, agile team with an intimate atmosphere that offers direct mentoring and broad professional growth. Insert DFT logic, perform synthesis, and run Automatic Test Pattern Generation (ATPG) to ensure hardware testability. Execute Gate Level Simulations, timing checks, and DRC checks to maintain rigorous design integrity and performance standards. Run regressions and perform deep-dive debugging on simulation failures as part of the core verification process.

Required ASIC Design & Verification Engineer
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
Silicon One is transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Required PHY Post Silicon Validation Engineer
Job Description
What You'll Do
Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development.
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Who You'll Work With
You'll be part of our Group driving our game changing next generation network devices - Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporation. The position includes hands on work in our lab in Caesarea and Netanya.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
Silicon One is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

Required PHY System
Job Description
Join the PHY system team at Silicon One, a pivotal part of our silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.
What Youll Do:
Youll be part of the group driving next-generation network devices-Silicon One-within a startup-like atmosphere inside a well-established, leading corporation.
Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

Required IC Package Layout Designer
Job Description
Meet the Team
Join the Package Design Team at Silicon One in Israel, a group leading the way in developing our groundbreaking silicon solutions for next-generation networking. As a collaborative team at the center of our silicon development, we design and optimize advanced package solutions for some of the industrys most sophisticated ASICs. Youll work directly with experts in layout, signal integrity, and power distribution, shaping innovative methodologies and driving the evolution of high-performance networking technologies.
Your Impact
This role offers a unique opportunity to make a significant impact on the future of networking innovation within the Silicon One initiative. As a layout engineer, you will drive the entire package design layout process-from planning and optimization to execution-ensuring the delivery of high-speed, robust, and scalable solutions for global networks. You will work closely with engineers, define strategies, and collaborate across multi-functional teams to accelerate the creation of industry-leading packages. Youll join a passionate community dedicated to changing how the world connects, works, and learns, while building strong partnerships and fostering collective success.
Responsibilities:
Lead package layout design while planning and driving schedules from initial concept through full implementation.
Optimize package pinouts, stack-ups, power distribution, and high-speed routing, balancing performance and manufacturability
Collaborate with signal integrity (SI) and power integrity (PI) teams to ensure design quality and efficiency
Enhance design methodologies and partner with vendors to improve product quality and efficiency
Drive innovation in package solutions for our next-generation ASICs.

We are seeking a Physical Design Technical Leader.
Meet the Team
Physical Design team within Silicon One is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Required PHY Firmware Technical Leader
Meet the Team
Join the Silicon One PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.
We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.
Your Impact:
Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies
Who Youll Work With:
The Silicon One group, the center of our ASIC design efforts
Cross-functional teams including silicon design, firmware, and system
Global teams working together to deliver game-changing networking devices

Silicon One is seeking a Physical Design Group Leader.
Meet the Team
Physical Design team within Silicon One is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
As the Physical Design Group Leader, you will provide strategic and technical leadership to a team of engineers, guiding them through the entire chip design lifecycle. You will be responsible for the group's output, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.