לוח משרות דרושים חשמל ואלקטרוניקה מתאים גם לסטודנטים, לחיפוש זה נמצאו 46 משרות

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we are seeking a motivated Physical Design Student to join our founding local engineering team.
This is a unique opportunity to kickstart your career in the semiconductor industry. Working alongside senior industry veterans, you will gain hands-on experience in backend execution and advanced methodologies for cutting-edge chips that power the world's largest AI clusters. If you are passionate about silicon hardware, eager to learn, and thrive on solving complex engineering challenges, this role offers the perfect bridge between your academic studies and a high-impact career.
Key Responsibilities
Guided Implementation & Learning
Partner with and learn from senior engineers to support the physical implementation journey, including synthesis, floorplanning, Place & Route (P&R), and Clock-Tree Synthesis (CTS)
Assist in macro-level implementation and develop hands-on skills in complex layout routing
Participate in deep-submicron process challenges under close professional mentorship
Signoff & Design Integrity Support
Assist in running engineering checks for design integrity, including Static Timing Analysis (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR)
Learn to apply Logic Equivalence Checking (LEC) to help guarantee design correctness
Gain exposure to the rigorous flows required to ensure first-pass silicon success
Scripting & Cross-Functional Collaboration
Leverage and develop scripting tools to automate repetitive tasks and optimize the engineering environment
Collaborate with Architecture, Design, and DFT teams to understand how different chip design disciplines intersect
Actively participate in team reviews and technical discussions to ramp up backend methodologies.

The industry leader in the web data domain, is looking for students for a part-time Deploy position!
The position is part-time, in shifts that include nights and weekends.
Responsibilities
Monitor and support company servers in Linux
Release new features and updates on the server
QA (manual).

As a CAD Engineering Student, you will join an experienced CAD, DevOps, and Emulation team, working on cutting-edge VLSI infrastructure. You will support automation, release processes, and emulation flows while gaining hands-on exposure to full chip development environments.
Responsibilities:
Support VLSI infrastructure, automation flows, and release processes.
Assist in developing and maintaining CAD/DevOps scripts and tools
Participate in emulation activities and environment setup
Collaborate with design and verification teams to improve engineering efficiency.

Analyze and investigate RF signals across the electromagnetic spectrum.
Identify and diagnose spectrum anomalies and mitigate electromagnetic interference (EMI).
Operate measurement equipment such as Spectrum Analyzer, Network Analyzer, and Signal Generator.
Collaborate with technical teams to implement RF solutions.
Job location- Central Israel
scope of hours: 100-160 hours.

· Assist in the development, integration, and validation of electronic boards and subsystems . · Participate in laboratory measurements and engineering validation activities · Develop automation and AI-assisted engineering tools to support development and validation workflows . · Collaborate with multidisciplinary engineering teams throughout development and integration phases.

DFT Intern - ASIC Student - Israel - ETR
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
Who We Are
The Design for Test (DFT) team is part of the design group, which focuses on logic design, RTL development, and running verification tests. Their main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing. The goal is to detect potential manufacturing defects with maximum efficiency and filter out faulty units before they reach the market.
The ideal candidate is friendly, social, easygoing, with a good sense of humor, and has the ability to learn independently. They should be located in central\north Israel (Tel-Aviv\Caesarea). Strong independent work skills and job stability are important.
What You'll Do
Work in a small, agile team with an intimate atmosphere that offers direct mentoring and broad professional growth. Insert DFT logic, perform synthesis, and run Automatic Test Pattern Generation (ATPG) to ensure hardware testability. Execute Gate Level Simulations, timing checks, and DRC checks to maintain rigorous design integrity and performance standards. Run regressions and perform deep-dive debugging on simulation failures as part of the core verification process.