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We are looking for an experienced Lab Support Technical Leader to lead our R&D lab operations.
This role combines technical leadership, operational management, hands-on work and strategic planning across worldwide labs. You will report to the Lab Manager.

Why Join Us?

Opportunity to lead global broadband R&D lab infrastructure.

Work with cutting-edge DOCSIS, PON, virtualization, and networking technologies.

High-impact role with strong technical ownership and leadership influence.



Location

On-site - working 5 days a week from our office in Caesarea.



What you will be doing:

Lead R&D lab operations supporting large-scale broadband and networking environments.

Lead and mentor the Lab Support team, including goal setting, KPIs, SLA management, prioritization, and professional development.

Providing hands-on support for lab infrastructure installations and deployments when required.

Architect, design, and maintain advanced networking infrastructures, including switches, routers, servers, and virtualization platforms.

Lead deployment and support of new lab installations.

Establish and maintain documentation standards across Confluence, Jira, Visio, and related systems.

Lead automation and operational efficiency initiatives to improve scalability,

Provide regular executive-level reporting on lab operations, project status, risks, and roadmap progress.

Manage timelines, ETAs, and stakeholder expectations across multiple concurrent activities.

We are looking for a hands-on engineer to join our Platform Architecture post-silicon team. This team analyzes and tunes the performance and power of Apple Silicon for the Mac, and takes the learnings and measurements to drive SoC architecture change for future chips. If you work comfortably across the hardware/software stack, and the idea to bring up brand-new chips that just arrived from the fab does not scare you but gets you excited, when we would like to hear from you.

You will join a multidisciplinary team of architecture, silicon design, and system software engineers driving the performance and energy efficiency of Apple SoCs. The work spans application software, system software, SoC architecture, and microarchitecture, and sits at the intersection of measured silicon behavior and forward-looking architecture definition. You will build a deep understanding of how current and planned Apple products behave end to end, and use it to influence both hardware and software direction.

Responsibilities
Tune and define SoC memory and fabric performance state controllers on unreleased silicon, and propose improved control and observability mechanisms for future generations.
Plan and execute architecture studies that drive performance and energy-efficiency decisions for future SoCs.
Build tools, workflows, and automation for repeatable analysis of simulated and measured data, including terabyte-scale traces from prototype devices.
Architect hardware features that improve workload characterization and enable robust online control of power and performance.
Debug complex interactions between system software and SoC hardware.
Assess the feasibility of future use cases, SoCs, and products.
Communicate findings across chip design, architecture, software, and system teams to enable data-driven decisions.

As a member of our ML group, you will design, prototype, and ship agentic GenAI systems used by chip design engineers to accelerate their day-to-day workflows. We are looking for a machine learning engineer who is energized by taking LLMs from "promising demo" to "depended-on tool": designing the agent loops, retrieval pipelines, and evaluation frameworks that make this transition real. Success in this role means agents that meaningfully shift how our customer teams work, backed by measurements you trust.

You will join a growing team of ML and software engineers building GenAI solutions for chip design teams. In this role, you will:

Design and build agentic systems featuring multi-agent coordination, long-horizon reasoning, tool use, and planning frameworks.
Develop end-to-end solutions, including domain-specific agents and high-performance retrieval pipelines spanning diverse data sources.
Partner with subject-matter experts on the customer teams to translate their workflows and rules of thumb into concrete agent assignments, prompts, tools, and guidelines.
Build the evaluation backbone for our agents: define success measures, curate offline golden sets, and instrument online telemetry to power feedback loops that drive fast, safe iteration with real cost and quality control.
Drive prompt engineering, model selection, and lightweight model adaptation as the workloads demand.
Collaborate closely with software engineers on the team to productionize your work, and with researchers and customers to shape what we build next.
Stay current with the rapidly evolving agentic and LLM landscape and bring promising techniques into our products with good engineering judgment.

As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!


As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise ).

As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!

As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )

We are looking for a highly experienced Quantum Control Systems Engineer (Application Validation Team) who embodies ambition and positivity. Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
As a Quantum Control Systems Engineer on the Application Validation Team, you will be responsible for validating the software and hardware systems that drive quantum computing operations, ensuring that programs ranging from calibrations to error correction procedures perform as expected on all our quantum controller hardware. This includes designing, implementing, and testing scalable software and hardware frameworks across various qubit types, as well as developing tools that support the validation and execution of control software across different configurations and execution platforms.
Your role will also involve developing a robust software infrastructure that automates the validation process, integrates with real hardware systems, and supports continuous integration (CI) and continuous deployment (CD) pipelines.
This is an exciting opportunity to work at the forefront of quantum computing technology while ensuring the performance, reliability, and scalability of cutting-edge control systems.
Join us in this exciting journey to redefine the future of quantum computing.
Responsibilities:
Quantum Computing Routine Validation: Validate quantum computing programs on our quantum controllers, including calibration procedures, error correction routines, and other algorithms, ensuring they meet the required performance standards.
Scalable Routine Design: Design and implement scalable quantum routines in Qua and other quantum computing languages, optimizing various qubit types and quantum computing architectures.
Framework Development: Develop tools and frameworks that support validation, ensuring scalability and integration into our hardware and software development process.
Automated Testing and CI/CD Integration: Build and maintain automated testing systems, incorporating CI/CD processes to ensure seamless integration and validation of quantum control software on real hardware.
Data Analysis: Analyze measurement data from quantum controllers, using this data to improve implementations across the whole software stack.
Cross-Functional Collaboration: Work closely with quantum physicists, customers software engineers, and hardware engineers to troubleshoot issues, refine quantum routines, and ensure the overall system's performance.

Required Micro-Architect
Description:
A global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At our core olies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.

We are looking for an excellent design engineer to join our team and build our state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player, and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface.

We are looking for a highly experienced a hands-on Compiler Engineer who embodies ambition and positivity.
Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
Responsibilities:
Develop our compiler from a proprietary quantum language to a proprietary processor tailored to realize and accelerate quantum computing.
Take on complex optimization challenges at the core of our unique compiler, focusing on real-time applications, hybrid quantum/classical algorithms, and parallel processing.
Conduct rigorous testing, debugging, and profiling to ensure the performance and correctness of compiler outputs.
Hands-on development and debugging of software to optimize the utilization of limited hardware resources, enabling the scaling of quantum computing systems and improving quantum algorithm performance on our cutting-edge quantum orchestration platform.
Collaborate closely with hardware, software and architecture teams to ensure seamless software-hardware integration, directly enhancing system capabilities and performance.

We are looking for talented engineers to join the Pre-silicon Verification team and help us technically lead the challenges of the next decade, developing a semiconductor platform based on revolutionary architecture, and taking part in the development of cutting-edge products within a disruptive system architecture.
Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment.

We're looking for a System Engineer with Software or Hardware Engineering background to be part of defining, shaping and integrating solutions to next generation of our cloud platforms.

We are looking for an exceptional engineer to own the development, testing, and monitoring of the manufacturing health of our Graviton server products. You will be part of a team integrating new silicon, hardware, firmware, and software into a revolutionary system architecture.

Key job responsibilities
Lead triage, debugging, and root cause analysis of systems in AWS data centers.
Enhance troubleshooting capabilities and drive closure of in-fleet problems.
Analyze customer workflows and requirements to provide targeted resolutions.
Collaborate with Annapurna Labs monitoring team and root cause teams to improve product quality and reliability in fleet operations.
Represent the customer voice by providing fleet operation insights and requirements to Annapurna Labs' ASIC design, software development, QA, and architecture teams.
Develop and maintain training materials, quality documentation, and collateral to improve in-fleet operations.
Design and implement tools and scripts to support projects and customize solutions based on requirements.
Travel as needed, approximately 2-4 times per year.

As a System Verification Software Engineer, you will join a unique team that works at the heart of chip development, at the HW/SW boundary, collaborating across teams to ensure our semiconductor platforms meet the highest standards before they reach production, as we lead the market with our cutting-edge devices.
Youll be part of a team that verifies Graviton chips across emulation, silicon, and AWS production fleets-developing the tests, automation, and debug tooling that give us confidence our features function correctly on real hardware.

Key job responsibilities
* Verify and validate Graviton chips in emulation, silicon, and post-production.
* Develop tests that ensure our features function as intended.
* Build automation and debugging tools for silicon regressions and bring-up.
* Collaborate with hardware design and software teams to identify, analyze, and resolve design issues and verification gaps.
* Debug failures across diverse platforms (emulation and silicon).

We are looking for an experienced and hands-on ATE Engineer to design, develop, and maintain the data and software infrastructure supporting our Automated Test Equipment (ATE) environments. In this role, you will establish the database architecture, data pipelines, reporting tools, and infrastructure required for electronic card testing, system-level testing, and radar calibration of advanced radar systems. Key Responsibilities:
* Design and maintain the ATE database and software infrastructure.
* Develop data pipelines, APIs, and integrations for ATE systems.
* Build BI dashboards and reports for production and test data.
* Ensure data integrity, traceability, backup, and availability.
* Support deployment across production sites and secured networks.
* Collaborate with ATE, Production, IT, Quality, and Cybersecurity teams.

We are seeking a highly motivated Application Engineer & Technical Marketing Specialist to support customers worldwide in the integration and deployment of advanced gimbaled EO/IR payloads, combining Visible (VIS) and Long-Wave Infrared (LWIR) cameras for UAV and drone applications.
This customer-facing role combines system engineering, technical support, product marketing, and business development activities. The successful candidate will serve as the technical bridge between customers, engineering teams, and sales organizations, helping customers maximize the value of our solutions while identifying new business opportunities.
Job Responsibilities:
Key Responsibilities
Technical Support & Application Engineering:
Provide technical support to customers and partners throughout the product lifecycle.
Support integration of EO/IR payloads on UAV, UAS, drone, and robotic platforms.
Conduct system configuration, troubleshooting, testing, and validation activities.
Lead technical investigations and resolve complex field issues.
Perform on-site customer support, demonstrations, acceptance tests, and field trials.
Work closely with multidisciplinary R&D teams including mechanical, electrical, software, and system engineers.
Develop application notes, integration guides, and technical documentation.
Deliver technical training to customers, distributors, and system integrators.
Support pre-sales and post-sales activities worldwide.
Technical Marketing & Business Development:
Conduct customer presentations, product demonstrations, and technical workshops.
Identify customer needs and translate market requirements into product recommendations.
Assist in preparation of marketing materials, technical presentations, and demonstration scenarios.
Support preparation and technical responses to RFIs/RFPs.

About the role Bird Aerosystems is hiring a senior real-time embedded software engineer for a team of 11 that builds firmware for airborne systems. The role sits at the hardware/software boundary. You will bring up new boards, write drivers and real-time firmware on ARM and FPGA-based platforms, and take features from design through lab integration to field trials. We are looking for an electronics engineer who writes production C/C++ and is at home with a scope and a schematic.