לוח משרות דרושים מהנדס רכיבים בחיפה וסביבתה

we are seeking a HW Board Design Engineer for Test and Qualification team.
Your Impact

You will be responsible for hardware board design activities with a strong focus on test, qualification, and readiness for production. This role spans all phases of hardware development, from architecture and design through bring-up, validation, and qualification:

Define hardware architecture and board-level design strategy with test, qualification, SI, and PI requirements in mind

Oversee schematic design, PCB layout, and component selection

Review designs for quality, reliability, cost, manufacturability, testability (DFM/DFT), signal integrity (SI), and power integrity (PI)

Own test readiness, including support for bring-up, debugging, validation, and qualification

Work closely with FW, SW, mechanical, QA, test, and manufacturing teams

Drive design reviews, SI/PI risk analysis, and technical decision-making

Support transition from prototype to qualified hardware and production release

Ensure compliance with relevant standards and qualification requirements

Spearhead innovative switch system design, guiding the process from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.

Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities:
Modeling of HW specification of new architecture and microarchitecture. Working closely with architect and microarchitecture on modeling the specification.

about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.the ml, systems, & cloud ai (msca) organization at google designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all google services (search, youtube, etc.) and google cloud. our end users are googlers, cloud customers and the billions of people who use google services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including google clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
lead the schematic capture and component selection for high-density, multi-layer pcbs (20+ layers) incorporating high-power asics (tpus/cpus), fpgas, and high-speed memory (hbm/ddr5).
design and validate high-speed interfaces including pcie gen 6.0/7.0, 400g/800g/1.6t ethernet (pam4). collaborate with signal integrity (si) engineers to define routing constraints and stack-up.
design multi-phase power regulators (vrms) capable of delivering >1000a currents with fast transient response for ai processors.
work with pcb layout designers to guide placement and routing of critical signals and power planes.
lead the lab bring-up of first-silicon/first-board by debugging hardware issues using oscilloscopes, tdrs, and logic analyzers to root-cause failures to component, assembly, or design issues.

we are looking for a Emulation Engineer.
Key Responsibilities:
Set up and maintain emulation hardware infrastructure
Port RTL designs into emulation platform
Debug hardware and software issues
Develop workflows for emulation
Collaborate with emulator vendor FAs
Support users and debug issues

Were growing and looking for a hands-on CAD Engineer who loves building tools that engineers actually enjoy using.
If you like moving fast, owning features end-to-end, and collaborating with smart people across disciplines-come build with us.
Responsibilities
Partnering with multiple engineering disciplines to define, improve, and maintain CAD/EDA development methodologies
Building CAD desktop applications that support EDA solutions and real design workflows
Writing production-quality code, plus unit tests that keep things solid as we scale
The team's vibe:
We value innovation, teamwork, and ownership
Youll have real impact, real autonomy, and a team that actually ships.

We are redefining urban mobility by proving that autonomous vehicles can navigate complex environments using vision-only technology.
As our Hardware Systems Integration Engineer, you will be the lead architect responsible for the "nervous system " of our vehicles. You won't just be selecting components; you will be evaluating infrastructure that enables our AI software to see, process, and React to the world in Real-Time.
Responsibilities:
* Vision-Centric Architecture: Lead the selection and integration of high-dynamic-range (HDR) automotive-grade cameras.
* Compute Platform Selection - Evaluate and benchmark high-performance edge platforms (e.g., NVIDIA Orin, Qualcomm Snapdragon, Ambarella, or custom SOC solutions) capable of handling massive parallel video streams with minimal latency.
* Thermal & Power Integrity: Design integration of computing HW into automotive grade environment. This work can be done with external suppliers.
*  system Synchronization: design and ensure sensor synchronization.
* Redundancy Planning: architect fail-operational hardware systems to ensure the vehicle remains safe even if a specific component or communication bus fails.
* Present to and consult with the group leaders as to hardware design trade-offs