דרושים » הנדסה » Hardware Systems integrator Engineer

about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.the ml, systems, & cloud ai (msca) organization at google designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all google services (search, youtube, etc.) and google cloud. our end users are googlers, cloud customers and the billions of people who use google services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including google clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
lead the schematic capture and component selection for high-density, multi-layer pcbs (20+ layers) incorporating high-power asics (tpus/cpus), fpgas, and high-speed memory (hbm/ddr5).
design and validate high-speed interfaces including pcie gen 6.0/7.0, 400g/800g/1.6t ethernet (pam4). collaborate with signal integrity (si) engineers to define routing constraints and stack-up.
design multi-phase power regulators (vrms) capable of delivering >1000a currents with fast transient response for ai processors.
work with pcb layout designers to guide placement and routing of critical signals and power planes.
lead the lab bring-up of first-silicon/first-board by debugging hardware issues using oscilloscopes, tdrs, and logic analyzers to root-cause failures to component, assembly, or design issues.

we are looking for a Hardware Lead Engineer.
As HW Lead Engineer, in the Nitro team, you will be responsible for defining Annapurna Labs Smart Network Interface Card (NIC) design, leading development and validation cycles, and bringing the product to healthy mass production.
Youll provide leadership in new technologies, bringing them to large-scale deployment, in a continuous effort to deliver a world-class customer experience. We offer a fast-paced, intellectually challenging position, where youll work with technical experts, senior leaders, covering multiple technologies. We are changing the industry, and looking for individuals who are ready for this challenge and want to reach beyond what is possible today.
Key job responsibilities:
- Define the architecture and design specifications of next generation K2 Nitro Cards.
- Own full product life cycle, engage with design partners and manufacturing sites to enable high-yield mass production.
- Lead the analysis and debugging of complex design, manufacturing, and integration challenges.
- Continuously design for process optimization to improve product quality, simplify workflows, and accelerate the Nitro card development lifecycle.

we are a multidisciplinary development team working on a cutting-edge autonomous driving project, at the forefront of automotive technology. the team develops complex ecus that combine multiple socs, low-level firmware, hardware, validation, and automation systems, enabling next-generation autonomous capabilities. we work closely with hardware, system, verification, and automation groups to bring up, debug, and validate advanced automotive platforms from early development stages through production. this is a highly technical, hands-on environment focused on solving real system -level challenges.
what will your job look like:
debug complex hw/fw and system -level issues in an autonomous vehicle platform
perform deep root-cause analysis across firmware, hardware, and automation systems
lead firmware bring-up, integration, and debug of ecus with multiple socs
debug and support automation systems, including lab automation and fw verification environments
analyze failures originating from automated TEST systems and distinguish between fw, hw, and TEST infrastructure issues
work closely with hw, system, validation, automation, and architecture teams
support issues from early development stages through production and field failures
contribute to firmware debug methodologies and verification strategies
provide technical leadership and mentoring when needed.

We are looking for a skilled and motivated experienced rt systems integration & release manager to lead an systems integration team and own the end-to-end integration and release process for Real-Time Embedded products. this role is responsible for defining integration workflows, managing team execution, and ensuring that system releases are stable, predictable, and aligned with quality and delivery commitments.
the ideal candidate combines deep Embedded systems expertise, strong people leadership, and disciplined release and process management. what will your job look like:
directly manage and mentor a team of  rt systems integration and release engineers.
define, implement, and continuously improve the rt system integration and release management processes.
establish standard workflows, best practices, documentation, and quality gates.
ensure consistent execution of integration activities across projects.
drive alignment to integration processes across firmware, software, hardware, QA, and system validation teams.
identify integration risks early and implement mitigation strategies.
lead system -level integration of  Real-Time hardware and software.
manage system debugging, and root-cause analysis of complex integration issues.
oversee validation, verification, and system -level testing activities.
communicate progress, risks, and mitigation strategies to stakeholders and leadership.

Mechatronics & Components Engineer We are seeking a Mechatronics & Components Engineer to support the development of advanced products through selection, evaluation, and integration of mechanical and electromechanical components.

Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities:
Modeling of HW specification of new architecture and microarchitecture. Working closely with architect and microarchitecture on modeling the specification.