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we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Package Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, Driving the physical implementation strategy for chips that power the world's largest AI clusters.
As a Package Design Engineer, you will be a core technical contributor in the development of advanced IC packaging solutions for high-performance connectivity silicon. You will execute the package flow, design, and qualification from concept through production, working closely with silicon, signal integrity, power integrity, mechanical, manufacturing, and external OSAT partners. You will be responsible for implementing package technologies that meet aggressive electrical, thermal, mechanical, and cost targets, enabling our company products to operate reliably in the worlds most demanding AI and cloud environments.
Key Responsibilities
Execute end-to-end IC package design, from early feasibility and detailed design through to qualification and high-volume manufacturing
Implement package architecture and utilize advanced technologies (organic substrates, advanced laminate, interposers, multi-die/chiplet packaging, CoWoS - 2.5D/3D integration)
Drive signal integrity (SI), power integrity (PI), and thermal considerations at the package level for high-speed, high-power devices
Perform package layout, substrate routing, bump/ball maps, stack-ups, materials selection, and apply mechanical constraints
Collaborate closely with silicon design, SerDes, system, SI/PI, and reliability teams to optimize overall product performance
Interface directly with OSATs, substrate vendors, and manufacturing partners to ensure design-for-manufacturability (DFM), yield, and cost targets are met
Conduct package-related risk assessments, failure analysis, and corrective actions during bring-up and production ramp
Support NPI, qualification, and product sustainment activities, including vendor technical reviews.

1. AI Architecture & Technical Leadership

Guide AI architectural direction across platform, focusing on system design, model lifecycle, and integration of AI components into product workflows.
Act as a senior technical reviewer and thought partner for complex or cross-team AI design decisions.
Provide technical oversight on areas such as exploring new models/technologies/opportunities for the company
Surface architectural risks, tradeoffs, and long-term implications, including cost, security and compliance aspects and clearly advise the VP of AI when certain technical directions should not be pursued.
This role influences judgment, clarity, and experience, not through blocking authority.

2. Hands-on Applied Innovation (Core Pillar | ~50%)

Spend at least 50% of time hands-on, building:
End-to-end AI prototypes
Technical demos and proofs of concept
Exploratory implementations of new AI capabilities
Drive applied innovation that:

De-risks new technologies
Demonstrates feasibility and impact
Informs product direction and business opportunities
Build fast, concrete examples that teams can learn from and extend.
Transition successful prototypes to team ownership for further development and scaling.
This role is expected to lead AI innovation by doing, while working closely with product, medical and engineering

3. Best Practices & Technical Enablement

Define and promote best practices for applied AI development, including:
Rapid prototyping and vibe coding.
Agent design, orchestration, and evaluation patterns
Experimentation, benchmarking, and validation workflows
Help teams align on shared technical patterns, tools, and standards.
Identify opportunities to consolidate duplicated efforts and improve cross-team coherence.
Lead technical deep dives, architecture discussions, and design reviews.
4. AI Compliance & Regulatory Enablement (Technical Scope)

Ensure Navinas AI development practices align with applicable AI regulations for a software product handling sensitive medical data.
Define and guide AI-specific compliance practices, including data usage, transparency, evaluation, and documentation expectations.
Support and contribute to AI-related compliance and regulatory documentation, in close collaboration with Legal, Security, and Medical Research teams.
Serve as a technical point of reference for AI compliance questions.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Physical Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the backend execution and methodologies for chips that power the world's largest AI clusters.
As a Physical Design Engineer, you will be a key architect of our silicon's physical reality. You won't just execute a flow-you will help establish our local execution culture and technical standards, owning the transformation of complex logic into high-performance silicon. You will drive the physical implementation journey from synthesis through signoff, ensuring our connectivity solutions meet the extreme performance, power, and area targets required for next-generation AI infrastructure. If you thrive on solving complex challenges in deep-submicron processes and want to shape the backend methodology for AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Physical Implementation & Execution
Be part of the founding Backend team in Israel, playing a critical role in establishing local execution culture and technical standards
Take full responsibility for physical implementation journey including Synthesis, Floorplanning, Place & Route, and Clock-Tree Synthesis (CTS)
Own macro-level implementation with deep hands-on experience in floorplanning and complex routing
Signoff & Design Integrity
Drive final stages of design integrity, owning Timing signoff (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR)
Ensure first-pass silicon success through rigorous signoff flows and analysis
Apply Logic Equivalence Checking (LEC) and other verification techniques to guarantee design correctness
Methodology Development & Cross-Functional Collaboration
Participate in defining and refining Backend methodologies with autonomy to improve workflows and tool automation
Work closely with Architecture, Design, and DFT teams to navigate challenges of advanced process nodes and high-speed connectivity
Leverage scripting and automation to make engineering environment faster and more robust.

We are looking for a Customer Success Program Manager to lead cross-functional initiatives that improve customer outcomes, operational efficiency, and scalability across our global CS organization. Based in Israel, you will serve as the strategic anchor bridging our US commercial teams and local R&D/Product pods.

In this role, you will optimize post-sales infrastructure, manage high-stakes account escalations, and translate customer requirements into technical product reality to maximize net retention. The ideal candidate is a highly organized, data-driven operator who can seamlessly collaborate across CS, Product, Engineering, and Operations teams.

Responsibilities
Escalations & Risk Management: Own the operational management of commercial escalations and at-risk accounts, building health frameworks and early-warning mechanisms to identify risks and execute cross-functional remediation plans proactively.
Cross-Functional Programs: Lead strategic, cross-functional customer programs and initiatives, acting as the central project lead to orchestrate alignment and timely execution across US clients, CSMs, and local R&D pods.
Global Team Alignment: Act as the operational bridge between US commercial teams and local R&D/Product, establishing prioritization cadences and translating customer feedback and risks into clear technical context.
Infrastructure & Analytics: Design and scale core CS infrastructure, processes, and tools, partnering with cross-functional teams to optimize the technology ecosystem, refine lifecycle workflows, and operationalize performance dashboards.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

We are seeking our Data Operations Team Leader!
This person will oversee a team of data operations specialists responsible for labeling data for machine learning and AI projects.
This role involves managing day-to-day operations, ensuring annotation quality and accuracy, developing guidelines, and collaborating with cross-functional teams to meet project deadlines and objectives.
What Youll Do:
Manage the end-to-end data workflow, from incoming data through annotation delivery to the ML teams, including overseeing data upload processes and ensuring data availability.
Manage database operations and ensure the integrity and availability of annotation data.
Become a Subject Matter Expert in our data and actively participate in hands-on annotation projects.
Create and maintain onboarding materials, annotation guidelines, and operational documentation to support knowledge sharing and consistent annotation practices.
Lead a team of Data Operations Specialists by managing task assignments, scheduling, and day-to-day execution. Provide the tools and processes needed for efficient work, ensure high annotation quality in collaboration with the ML teams, and continuously improve workflow efficiency
Own the annotation platform, driving bug fixes, feature development, and workflow improvements using Python and GenAI tools.
Develop and maintain operational dashboards and real-time performance metrics to monitor team efficiency, quality, and output.
Collaborate closely with data scientists, machine learning engineers, and product managers to understand annotation requirements and project goals. Coordinate cross-functional communication, monitor operational KPIs, and oversee daily operations to keep projects on track and ensure adherence to shifting schedules.

Were seeking a Senior Data Analyst to take a key role in unlocking the value of our vast datasets collected over years and across a diverse client base. In this role youll dive deep into data related to power line capacity, macro-scale and micro-scale weather, grid resilience, conductors and more. Your work will directly influence how we optimize grid performance and respond to the challenges of todays energy landscape.
This role requires a combination of technical skills, analytical thinking, and business acumen. The ideal candidate is highly skilled in data analysis techniques and tools and has a strong ability to translate data insights into actionable recommendations. Youll thrive here if you enjoy blending technical expertise, critical thinking, and business understanding to drive smarter, data-informed decisions.
What Youll Do:
Collect and integrate data from various sources, including fiber-based data, weather stations, line sensors, and SCADA systems.
Be a part of the product management team - explore customer needs, define data products and processes, and align outputs of the data science team with the company roadmap.
Ensure data quality and consistency for accurate analysis and reporting.
Conduct statistical analysis and use data visualization tools to present findings.
Monitor and evaluate the performance of Dynamic Line Rating (DLR) systems and grid resilience detectors and identify opportunities for improvement.
Provide data-driven insights and recommendations to support decision-making processes.
Interpret and communicate results to customers and management in a clear and concise manner.
Present key findings of your analysis to customers around the globe.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in EMIR CAD to join our local engineering powerhouse from the ground up.
This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As a Physical Design Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.
You will continuously develop the Electro-Migration and IR Drop (EMIR) flow, working closely at the intersection of Physical Design, Analog/Mixed-Signal design, and Package Engineering.
Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) flow
Implement and maintain robust EMIR flows and methodologies using industry-standard tools (Ansys RedHawk-SC, Cadence Voltus, or equivalent)
Collaborate closely with Analog/SerDes designers to integrate current profiles and ensure robust power delivery to sensitive high-speed IP blocks
Partner with Package Design engineers to perform Chip-Package-System (CPS) co-analysis flow
Understand root-cause analysis for voltage drop violations and EM risks
Support silicon bring-up by correlating simulation results with actual silicon measurements and yield data.

We are now hiring a talented, self-driven, and passionate Senior DevOps to build and maintain optimized and highly available data pipelines that facilitate deeper analysis and reporting.
What Youll Do:
Lead the design and architecture of cloud-based data solutions, ensuring scalability, reliability, and performance.
Design and build data pipelines for field data collection, analysis, and inference using industry production-grade technologies and tools.
Design and build customer cloud / on-premise data solutions for storage, lookup, and processing flows.
Study and incorporate standards for data governance, security, and compliance.
Provide online and real-time monitoring and analysis of data systems health, accuracy, and costs.
Plan and execute integrations with our edge computing solutions and AI models for both research and production flows.

We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon engineering team. We are developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join accelerators IP group in Beer-Sheva, working on RiscV processor IPs.

Verification for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.

Daily work might involve any or all aspects of chip development: Verification, Design.

Work closely with Firmware and other groups around the globe.

This is not a typical full-stack position. We're looking for an exceptional Staff / Principal Engineer who can own complex technical domains, shape system architecture, and lead end-to-end development while remaining 100% hands-on. You will report directly to the VP R&D, work closely with them on technical strategy and architecture, gradually take ownership of architectural responsibilities across the platform, and become one of the company's leading technical voices. Along the way you'll help mayors and other city leaders understand their residents and their city in more effective ways, improving the lives of millions of citizens around the world.

Key Responsibilities
Own complex product domains from architecture through production
Lead end-to-end feature development across frontend, backend, and cloud
Drive architectural decisions and technical direction across the platform
Design and build scalable distributed systems
Design and develop AI-powered capabilities as part of the core product
Work closely with the VP R&D on technical strategy and architecture
Mentor engineers through technical leadership (without people management)
Serve as one of the company's technical leaders, influencing engineering standards and long-term technical strategy

We are now hiring a talented, self-driven and passionate Senior Data Engineer to build and maintain optimized and highly available data pipelines that facilitate deeper analysis and reporting.
What Youll Do:
Design, develop, and maintain scalable data pipelines that integrate data from multiple sources, including APIs, databases, streaming platforms, edge computing devices, cloud services, and on-premise systems.
Design reliable and business-critical data processing workflows for batch and real-time use cases.
Develop data access services and APIs that enable efficient communication between edge devices, cloud infrastructure, and on-premise environments.
Design and optimize storage solutions for structured, semi-structured, and high-dimensional sensor data to support AI model training, inference, and analytics.
Strong understanding of distributed systems and scalable data processing architectures.
Build and maintain scalable streaming data pipelines for low-latency processing and event-driven architectures.
Analyze existing data architecture, storage models, and processing workflows, and continuously improve performance, scalability, reliability, and maintainability.
Optimize cloud infrastructure and data storage costs while maintaining high availability and low-latency access.
Collaborate closely with Software, AI, Algorithms, DevOps, and Product teams to translate business requirements into scalable technical solutions.
Design monitoring, observability, and operational processes for data platforms.

We are looking for a best-in-class Senior Full-Chip Verification Engineer with a strong infrastructure mindset to join our Networking Silicon team. In this role, you will be responsible for the development and verification of our next-generation NICs at the system level, while also driving the evolution of the simulation infrastructure powering our verification flows. You will contribute to the architecture of high-speed communication devices by driving full-chip verification execution for the networking solutions powering the world's most advanced data centers, in a meaningful, growing environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Simulation Infrastructure & Acceleration: Identify bottlenecks in the verification flow and engineer creative solutions - building frameworks, optimizing regressions, and accelerating simulation throughput through innovative tooling.

Multi-Language Development: Work across a diverse technology stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting) - writing code and solving problems at every layer, from RTL testbenches to infrastructure utilities and automation.

System-Level Debug & Analysis: Gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance.

AI-Enhanced Development: Accelerate development by leveraging cutting-edge AI coding tools and frameworks - applied to both verification and infrastructure challenges.

Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the NIC.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary System Validation Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.
Job Description
The mission of this role is to perform system validation for our companys highly advanced devices, that includes defining strategy, develop tools, innovate, be creative to make sure devices are performing as they should in all aspects, logical, performance, durability, stress and more.
You will be part of the site located at Israel (Haifa - Matam), surrounded with highly experienced and professional engineers who will escort, mentor and support you on your journey at our company Labs Israel.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Silicon Technical Program Manager to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, leading the physical implementation strategy for chips that power the world's largest AI clusters.
As an Technical Program Manager, you will be the key architect of our silicons operational reality. You wont just track timelines - you will help establish our local execution culture and technical standards, owning the cross-functional journey of transforming complex logic into high-performance silicon.
Key Responsibilities
Drive and manage ASIC development and subsystems from concept through to production in collaboration with internal teams and external vendors.
Provide hands-on program management throughout the full development cycle of silicon and firmware, including concept, design, development, fabrication, validation, and production release.
Work closely with the software, hardware, and architecture teams to align with product requirements and ensure all constraints are met.
Lead process improvements across multiple teams and functions to drive better collaboration and efficiency.
Independently manage complex projects with minimal supervision, ensuring timelines and milestones are met.
Deliver high-quality ASIC solutions products while collaborating with product management and architecture teams.