דרושים » הנדסה » Senior FC Verification & Simulation Infrastructure Engineer

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing full-chip physical design methodologies, Physical Verification development and support through all the projects, Tapeout activities for implementation of networking chips and SOCs.

Work closely with Full Chip Layout owners and block owners, project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art FCL physical design problems that are needed for our chips.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

Participating and developing flow and tool methodologies for fullchip, physical design verification across multiple projects.

We are looking for a Chip Design Verification Engineer to develop the next generation of DFT technologies.

As a Chip Design Verification Engineer in the DFT team at NVIDIA, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

We are seeking an experienced Senior Software Engineer to join our NIC Firmware Core team, with a special emphasis on simulation for network adaptors and verification infrastructure. Youll be part of a forward-thinking team dedicated to advancing the tools and frameworks that are used to develop the cutting-edge networking adapter technologies. Your role will be to drive the success of NVIDIA's current and upcoming networking devices by working across various platforms, including C++ object-oriented simulation, verification frameworks and C layer interfacing hardware and firmware.

What Youll Be Doing:

Develop a network adapter simulator that will be used for both development and testing of pre-silicon networking features.

Take part in implementing and assimilating frameworks for Design and Verification both for real-time and simulator environments.

Addressing and solving automation and performance challenges.

Collaborate with chip design, software, and architecture teams to define and craft legacy and new firmware flows.

We are seeking an experienced Senior Firmware Engineer to join our NIC Firmware Core team, with a special emphasis on simulation for network adaptors and verification infrastructure. Youll be part of a forward-thinking team dedicated to advancing the tools and frameworks that are used to develop the cutting-edge networking adapter technologies. Your role will be to drive the success of our current and upcoming networking devices by working across various platforms, including C++ object-oriented simulation, verification frameworks and C layer interfacing hardware and firmware.

What Youll Be Doing:

Take part in implementing and assimilating frameworks for Design and Verification both for real-time and simulator environments.

Addressing and solving automation and performance challenges.

Collaborate with chip design, software, and architecture teams to define and craft legacy and new firmware flows.

We are looking for a best-in-class Chip Design - HW Emulation Senior Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in emulating our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. Join our world-class emulation team in Israel. Our focused team takes Switches/NICs/SoCs designs and program the emulators to behave like our silicon. Are you ready to take on interesting problems and craft solutions? Come check out our team.

What you will be doing:

The main responsibility is emulation and prototyping of complex chip designs. This includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.

The job also requires close collaboration with design, verification, and software engineers to enable embedded software and application software development.

Connecting emulator/FPGA based solutions to real external H/W or virtual targets, taking care of complex testbench and different protocols.

This is a role for a versatile engineer that includes RTL design, verification, FPGA partitioning and implementation, scripting, and lab-based bring up of the design.

We are looking for an experienced DFT Engineer to join an exceptional team of DFT experts to develop the next generation DFT technologies.

As a DFT engineer at the networking group, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to productionץ

We are seeking a Network Solution Verification Engineer to join our R&D organization, focused on validating our customer-facing networking solutions at scale using a state-of-the-art End-to-End (E2E) simulation cluster environment.

In this role, you will be a hands-on technical contributor at the intersection of networking, automation, and AI-driven validation - designing and implementing the simulation frameworks, agentic workflows, and regression pipelines that ensure our networking solutions meet the highest standards of quality and real-world applicability before reaching customers.


What you'll be doing:
Designing and implementing end-to-end validation frameworks for our customer-facing networking solutions at scale, leveraging a dedicated E2E simulation cluster environment.
Writing, maintaining, and extending automated test suites and regression pipelines for networking protocols and large-scale simulation runs, ensuring repeatable, high-confidence validation outcomes.
Performing deep regression analysis on simulation results - identifying failure trends, isolating root causes, and delivering clear, actionable findings to architecture and design teams.
Developing agentic AI flows that autonomously perform regression analysis, detect coverage gaps, generate new test cases, and implement validation code - continuously learning from simulation results and product changes to accelerate coverage without manual intervention.
Integrating validation pipelines into CI/CD workflows to enable continuous, automated regression at scale, working closely with DevOps and platform teams.
Collaborating closely with Design, Architecture, and NCS teams to understand solution requirements, translate them into simulation scenarios, and provide early-cycle quality feedback that influences product direction.
Analyzing customer-reported networking issues, mapping them to simulation coverage gaps, and building targeted test cases that prevent regression.
Continuously exploring new simulation technologies, agentic frameworks, and networking standards to evolve and improve the team's validation methodology.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

Research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

Developing models for simulations and performance testing, analysing the results and development of future HW and SW.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are looking for an experienced Team Lead for the NIC FW verification infrastructure team. In this role, you will lead the verification infrastructure - ensuring testing infrastructure stability, scalability, and continuous improvement - while guiding the development of advanced modules and methodologies. You will be responsible for driving the teams technical direction, supporting the evaluation of data and control path for new features, and ensuring high-quality deliverables that meet the expectations of industry-leading customers. As a leader, you will mentor and grow a team of engineers, foster a culture of ownership and execution, and collaborate closely with NVIDIAs networking NIC FW teams.

What you will be doing:

Lead and drive team execution end-to-end, combining managerial ownership with hands-on technical contribution - including ownership of the verification testing domain, its flows, coverage and the regression cycle.

Develop deep expertise in NVIDIA technologies, with a strong focus on FW functionality with corresponding interfaces with HW and SW.

Drive team execution by setting clear priorities, removing blockers, and ensuring high-quality, timely delivery - while maintaining a high bar for technical excellence and clearly communicating priorities, trade-offs, and status to stakeholders.

Define and continuously improve testing methodologies, including leading retrospectives for missed bugs to identify gaps - driving actionable changes to test coverage, flows, and verifiers.

Act as a technical leader within the team, contributing to design discussions, mentoring engineers, and actively participating in high-level design and code reviews.