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Power the Future with us! At SolarEdge (NASDAQ: SEDG), we're a global leader in smart energy technology, with over 3,000 employees, offices in 20+ countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. The Integration Engineer will develop, perform and analyze System Validation tests and will take part in the system review processes, with an understanding of the market requirement, system design, and the end user’s expectations. What will you be doing?
* E2E responsibilities for SolarEdge system, and product validation and experiments.
* Plan and execute HW & SW system integration tests.
* Understand and study the System operation edges, and system design edges.
* Plan and design manual and script automation tests of SolarEdge Product



Country:
Israel

City:
Herzliya

The company EyeC VLSI team designs cutting-edge chips for RADAR systems used in ADAS and autonomous vehicles and is looking for an experienced DFT Engineer.
This is a unique opportunity to join a team of top-tier engineers working with the most advanced technologies to develop Autonomous Vehicle (AV) SoCs. Every engineer in our team plays a broad and diverse role, taking on significant responsibilities, being involved in critical development stages, and making a direct impact on the success of our projects.
What will your job look like:
You'll be responsible for the architecture of DFT solutions across the SOC (MBIST, SCAN, ATPG, LBIST and more).
Develop all the necessary RTL for the different modules.
Verify and Validate your design in GLS.
Develop ATPG to the highest requirements of Functional Safety (ISO26262).
Debug and analyze coverage and yield loss.
Support production activities and Si debug.

As a Silicon Engineering Manager you will be responsible for improving silicon-photonics yield and performance through data-driven analysis, cross-functional collaboration and proactive issue resolution.

You will serve as the key interface between R&D, Process and Production teams, ensuring efficient data flow, rapid issue identification and continuous process improvement across wafer fabrication, device testing, and packaging stages.

Responsibilities
Perform silicon process and chip-level data analysis, establishing correlation between chip and wafer performance.
Lead process debug and yield loss analysis at chip/wafer level, driving root cause investigations and corrective actions.
Manage engineering approval forum to release production material.
Collaborate closely with vendors to implement new product tests and resolve technical/process issues.
Act as a key interface between design, testing, and production teams, ensuring alignment across the product lifecycle
Oversee and coordinate the transfer of data related to silicon design, testing, fabrication, and characterization between Production and R&D departments.
Develop and implement data management strategies to ensure data accuracy, security, and accessibility.
Maintain proper documentation of data transfer protocols, version control, and data integrity checks.
Support data analysis efforts to improve silicon performance, yield, and quality.
Ensure compliance with company policies and industry standards related to data security and confidentiality.

our company's Automated Driving group in Haifa is looking for an experienced DFT Engineer.
This is an exciting opportunity to join a team of highly talented engineers, working on one of the most cutting edge technologies - Autonomous Vehicle (AV) SoC.
At our company's Automated Driving group, we know that the idea of a fully autonomous car is no longer science fiction, but a reality that we are creating!
We have spent more than 15 years developing the world's most Advanced Driver Assistance Systems (ADAS) and we are now leading the computer vision and machine learning domain, reaching fully automated driving experience (AV).
What will your job look like:
Develop all the necessary HW / FW / SW for the different modules
Verify and Validate our design
Debug and analyze coverage and yield loss
As a cutting edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts - as it required by the Automotive and Safety related products market (ISO26262).

we are looking for an Emulation Engineer to join our Radar VLSI team and drive the development of next-generation ASIC Sensors.
We are developing best-in-class automotive radar solutions to complement our companys autonomous driving platform. Joining our expert team, you will leverage our companys unique assets to work on cutting-edge technology in a dynamic and challenging environment.
What will your job look like?
In this role, you will build high-end Emulation environments based on new designs. The position involves building and integrating complex components, working with cross-functional engineering teams, and developing systems that will change the way we drive.
We are looking for an engineer who thrives on challenges and is committed to engineering excellence while navigating complex constraints.
Lead Emulation development for the VLSI team.
Work closely with SW, Logic, and Verification engineers.
Serve as an expert matter for your domain, with full responsibility for driving and implementing improvements and new ideas.

Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).

Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

our company SOC verification group owns the important and challenging job of verifying our company's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

our company SOC verification group owns the important and challenging job of verifying our company's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

our company's ML Platform group builds and operates the core infrastructure that powers large-scale AI workloads across on-prem bare-metal GPU clusters and multi-cloud environments. Our goal is to deliver the modern infrastructure and tooling that accelerates our company's entire algorithm development lifecycle - from a researcher's first experiment to a production deployment.
We are a small, independent group of engineers with diverse skills across software, infrastructure, and systems. We set the standards, build the cross-company products, and take end-to-end ownership of everything we ship.
What will your job look like?
Design, develop, and maintain the Python framework that enables algorithm developers across our company to train, validate, quantize, and deploy deep learning models - locally, on-prem, and across cloud providers - through a single unified interface
Build high-performance data streaming libraries that feed large-scale distributed training pipelines in Rust with Python interfaces
Set the standard for reliable, reproducible research at scale - experiment tracking, configuration management, checkpoint handling, and multi-node training
Work directly alongside algorithm researchers to understand friction, propose solutions, and ship them - without layers of process in between
Contribute to open source when the right fix/feature belongs upstream.

The SW validation team plays a key role in enabling the next generation of autonomous driving technologies. In their primarily Python-based development environment, they are responsible for developing and maintaining test content for the autonomous vehicle brain, supporting complex end-to-end validation flows across the system.
As part of the full autonomous driving pipeline, they work closely with cutting-edge technologies and gain direct exposure to the real-world impact of their work - helping bring some of our companys most advanced autonomous driving capabilities from development into reality.
What will your job look like:
Be the technical lead of the team that is responsible for the development of test content (mostly in Python) for the autonomous vehicle system and E2E flows
Review and approve system architecture requirements
Design and implement complex test solutions
Enforce compliance with autonomous vehicle industry standards.

The Road Algorithm team is responsible for one of the most critical and challenging tasks in autonomous driving - detecting and understanding the drivable road. Our work leverages Deep Neural Networks and geometric modeling to deliver reliable and high-quality road perception for autonomous vehicles.
We are looking for an Expert Deep Learning Research Engineer who will both drive independent deep learning research and collaborate closely with other developers to help unlock new directions, solve complex challenges, and elevate the teams algorithmic capabilities.
What will your job look like:
Conduct hands-on research and development of deep learning algorithms for road understanding, drivable area detection, and scene structure modeling
Lead exploratory investigations into new architectures, training strategies, and data utilization methods
Join forces with other developers to troubleshoot difficult problems, introduce new ideas, and guide technical decisions
Own projects end-to-end - from concept and experimentation to integration and scalable deployment.

The Road Algorithm team is responsible for one of the most critical and challenging tasks in autonomous driving - detecting and understanding the drivable road. Our work leverages Deep Neural Networks and geometric modeling to deliver reliable and high-quality road perception for autonomous vehicles.
We are looking for an Expert Deep Learning Research Engineer who will both drive independent deep learning research and collaborate closely with other developers to help unlock new directions, solve complex challenges, and elevate the teams algorithmic capabilities.
What will your job look like:
Conduct hands-on research and development of deep learning algorithms for road understanding, drivable area detection, and scene structure modeling
Lead exploratory investigations into new architectures, training strategies, and data utilization methods
Join forces with other developers to troubleshoot difficult problems, introduce new ideas, and guide technical decisions
Own projects end-to-end - from concept and experimentation to integration and scalable deployment.