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משרה בלעדית
4 ימים
Location: Tel Aviv-Yafo
What will you do:
Design and apply algorithms, based on time series models, other fields in Machine Learning and signal processing.
Take part in the entire research cycle: the idea phase, collecting and analyzing the data, writing simulations, exploring algorithmic approaches, building proofs-of-concept.
Communicate the results of your work to other team members by preparing intelligible reports that include clear visuals, analysis and explanations.
Share you work in external conferences, journals and patent submissions.
Communicate with hardware and firmware designers that will implement the algorithm in the Storage devices.
Gain knowledge on Storage cybersecurity threads.
Gradually acquire an increasing knowledge of memory systems, which will let you identifying bottlenecks and opportunities, and suggesting new project ideas.
Requirements:
Ph.D./M.Sc. in Computer Science, Electrical Engineering or a related field
Track record of publishing papers in high quality conferences such as NeurIPS and ICML
5+ years of work experience with primary emphasis on AI research
Proficiency in Python and ML packages
This position is open to all candidates.
 
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8135146
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28/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are seeking a highly skilled and expert Verification Lead to join our PCIe Firmware team. In this role, you will be responsible for supervising the verification plans, monitoring their execution within the teams, guiding engineers through the verification implementation, and tracking coverage, Coverity, and other relevant statistics. You will be joining a team dedicated to developing groundbreaking technology and building the core technology of next-generation devices across various fields, including low-level C layer between hardware and firmware, C++ verification environment, automation challenges, and Python testing environment.

What youll be doing:

Develop and lead verification plans, ensuring they are driven effectively within the teams.

Provide guidance to engineers on verification implementation within the verification environment.

Monitor coverage, Coverity, and other statistics to ensure comprehensive verification and optimization of next-generation NVIDIA products.

Work closely with firmware design, chip design, software, and architecture teams to define and craft both legacy and new low-level firmware flows.

Enhance methodologies and automated processes to improve efficiency and effectiveness.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering, Computer Science, or Computer Engineering, or equivalent experience.

12+ years of relevant experience.

Knowledge of object-oriented programming, computer structure, operating systems, and familiarity with Python or Bash is advantageous.

Problem-solving skills, independence, curiosity, strong interpersonal skills, and self-learning ability. Multi-disciplinary capabilities and the ability to work with a wide interface of people are crucial.

Ways to stand out from the crowd:

Familiarity with hardware verification concepts and tools such as C++, Jenkins automation, hardware familiarity, and test-driven development (TDD).

Experience in partnering with software and architecture teams to define and implement firmware.

Knowledge of PCIe, networking, Linux, and scripting languages, along with experience in solving in-depth problems.

Knowledge of object-oriented programming, computer structure, operating systems, and familiarity with Python or Bash is advantageous.
This position is open to all candidates.
 
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28/05/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Chip-Design Verification Engineer to join our Switch Silicon team. As a Chip Design Verification Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a design and verification team that develops the front-end design for the Switch silicon and the GPU.

Develop verification components and reference models, as well as verify and simulate chip blocks according to specifications under challenging constraints with a high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture and FW.
Requirements:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.

Completion of programming and logic design courses with high scores.

3-5 years of experience in RTL verification.

A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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28/05/2025
Location: More than one
Job Type: Full Time
We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation Infiniband and NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the Infiniband and NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

The architect should have experience in developing models for simulations, analyzing simulation results and development of optimization algorithms.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.
Requirements:
What we need to see:

B.Sc, M.Sc, or Ph. D degree in Computer Science, Computer Engineer, or Electrical Engineer.

At least 5 years of industry or research experience in computer networks.

Excellent understanding of large-scale networks behaviour and the effect of distributed computing workloads effect on the network.

Experience in development of simulation environments.

Possess strong managerial, problem solving and critical thinking skills.

Ability to work and operate in a highly dynamic environment.

Partner with multiple groups in the organization.

Ways to stand out from the crowd:

Good knowledge in network protocols - such as InfiniBand, IP, TCP and RoCE and network topologies.

Good knowledge in Python, C++.

Familiarity with HPC environments, routing algorithms, Omnet++ and NS3 simulation environments.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
28/05/2025
Location: More than one
Job Type: Full Time
We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation Infiniband and NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the Infiniband and NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

The architect should have experience in developing models for simulations, analyzing simulation results and development of optimization algorithms.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.
Requirements:
What we need to see:

B.Sc, M.Sc, or Ph. D degree in Computer Science, Computer Engineer, or Electrical Engineer.

At least 5 years of industry or research experience in computer networks.

Excellent understanding of large-scale networks behaviour and the effect of distributed computing workloads effect on the network.

Experience in development of simulation environments.

Possess strong managerial, problem solving and critical thinking skills.

Ability to work and operate in a highly dynamic environment.

Partner with multiple groups in the organization.

Ways to stand out from the crowd:

Good knowledge in network protocols - such as InfiniBand, IP, TCP and RoCE and network topologies.

Good knowledge in Python, C++.

Familiarity with HPC environments, routing algorithms, Omnet++ and NS3 simulation environments.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8196183
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
28/05/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a Senior Deep Learning Researcher for an excellent opportunity! This role provides an outstanding opportunity to engage in groundbreaking innovation and contribute to advancing diffusion-based technologies. You will work with pioneering methodologies and tools, crafting solutions that push the boundaries of AI capabilities.

What you'll be doing:

Invent and build ground-breaking techniques for efficient multi-modality model creation and publish the findings in leading journals and conferences.

Combine traditional diffusion technologies with the latest and greatest LLMs.

Contribute to our AI enterprise software to ensure robust and scalable solutions.

Collaborate with internal and external teams worldwide to drive research and development in multi-modal learning, using different professions and resources across the company.

Partner with leading scientific organizations and industry pioneers to remain at the forefront of technological advancements and integrate the latest innovations into practical applications.
Requirements:
What we need to see:

PhD. in Computer Science, Electrical Engineering, or a closely related field, or equivalent experience.

At least 3 years of relevant research experience.

Publications in prestigious conferences and journals like NeurIPS, ICLR, and CVPR.

In-depth understanding and active research experience in leading generative AI techniques, with a track record of contributing to advancements in this area.

Extensive experience in image and video understanding, generation, and reasoning.

Ways to stand out from the crowd:

High proficiency in programming and coding.

Degree from a top-tier institution or equivalent experience in a world-class industrial research group.

Substantial contributions to the multi-modality or diffusion forefront of research.

Experience in research fields of LLMs.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
28/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of our Networking chips. We're looking for profound and multi-disciplinary background in Clock design domains to lead Clocks Micro-Architecture activities. This role requires working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has grown substantially over recent chip generations with increased focus on performance, power and quality. Modern Clocking design needs to balance high frequency clocks with power, DFx, noise, circuit and physical design constraints.

What you will be doing:
Working on next generation of Networking Switch, NIC and SoC products.
Micro architect and design next generation clock topologies and modules.
ASIC Clock scheme definition.
Improve Power, Performance, and Area (PPA) of state-of-the-art chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL.
Collaborate with Physical design and timing team to evaluate Clocking concerns and come up with solutions for supporting high speed Clocking.
Understand physical aspects of the chip and develop enhanced clock distribution techniques.
Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.
Support Post-Si debug, characterization and productization activities.
Requirements:
What we need to see:
BSc or MSc degrees in EE or equivalent experience from known universities.
At least 5+ years of work experience in RTL design, Gate-Level and Circuit design optimization.
Deep understanding of logic optimization techniques and PPA trade-offs.
Excellent interpersonal skills and ability to collaborate with multiple teams.
Excellent problem solving and debugging skills.

Ways to stand out from the crowd:
Prior experience in RTL design (Verilog), verification and synthesis.
Clock IPs profound knowledge: PLL, DLL, Compensator.
Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects is a bonus. Prior experience in implementing on-chip clocking networks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8196107
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
28/05/2025
Job Type: Full Time
We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon engineering team. We are developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:
Join accelerators IP group in Beer-Sheva/ Tel-Aviv, working on RiscV platform unit and cache coherence IP.
design for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.
Daily work might involve any or all aspects of chip development: uarch , Design.
Work closely with Firmware and other groups around the globe.
Requirements:
What we need to see:
University B.SC. in Electrical Engineering/Communication Engineering/Computer Engineering.
5+ years of RTL design experience using Verilog/SystemVerilog.
High Level of English.

Ways to stand out from the crowd:
Experienced in CHI protocol or other cache coherence protocols.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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שליחה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
28/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work in a combined design and verification team that develops front-end design for the Switch silicon, GPU and HCA.

Plan and Design Verification units/blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, and FWinteraction with organization-wide groups.
Requirements:
What we need to see:

Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.

5+ years of experience in RTL verification. Less experienced engineers with high university grades will also be considered.

Experience in full and cluster-level verification is an advantage.

Self-motivated, ability to work independently and drive tasks to completion.

A great teammate with strong communication and interpersonal skills.

Ways to stand out from the crowd:

Knowledge in Specman, Verilog.

Knowledge in Networking.

Great interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
28/05/2025
Job Type: Full Time
We are seeking best-in-class ASIC Design Engineers to design and implement the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you will be doing:

Participate in micro-architecture development and document specifications.

Implement in RTL and work with the verification team to ensure that the design is functional.

Apply logic design skills to optimize and meet performance and power goals.

Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.
Requirements:
A Bachelors degree in electrical engineering or computer engineering.

5+ years of relevant experience in chip design development of complex designs.

Highly proficient in logic design, Verilog, and/or System-Verilog, with a deep understanding of physical design and VLSI.

Good interpersonal skills. And team player.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for an Analog Engineer.
As an Analog Design Engineer, you will:
Design and develop high-speed analog/mixed-signal circuits for industry-leading CMOS process nodes.
Lead all design stages, from architecture definition to final layout sign-off.
Perform circuit simulations, analysis, and debugging to ensure robust performance and reliability.
Collaborate with system architects, digital designers, and layout engineers to optimize circuit performance, power, and area.
Engage in post-silicon validation, debugging, and optimization to enhance circuit functionality.
Requirements:
B.Sc./M.Sc. in Electrical Engineering or a related field.
At least 5 years of experience in Analog Circuit Design on advanced process nodes.
Strong knowledge of circuit design flows and tools, from definition to layout.
Proven ability to independently handle complex design tasks.
Team player with a positive, can-do attitude.
Preferred Qualifications
Experience in high-speed analog design, including mixed-signal methodologies.
Knowledge of advanced CMOS process nodes and high-speed interfaces.
System-level understanding of silicon integration and debugging.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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26/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Own the special chiplet STA, analyze the timing results, verify correctness and provide budget for the different partitions.

Generate the timing constraints for the STA and the P&R flow.

Be exposed and work on a variety of exciting designs (including high cell count and high frequency), resolving complex timing and congestion problems.

Help to shape clock tree, and effect the work of the different teams (Front end, DFT & BE).

Daily work involves all aspect of STA & chip design: take part in SDC generation & review, actively running & analyzing STA tools, guiding the group during chip closure process, etc'.

Taking part inflows development.

Take part in ramping up new breaking technologies.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

5+ years of hands-on STA experience.

Experience in Prime Time and signoff methodologies.

Deep understanding of all aspects of Physical construction and Integration.

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8193613
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/05/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of rtl verification environments planning for units and modules.

Design RTL of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.

5+ years of experience in RTL design.

Knowledge in network protocols and/or HPC and distributed calculations - advantage.

A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8193610
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/05/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Formal Verification Engineer for our Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch and GPU technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies that are in the heart of th AI revolution. Our team delivers world class Chips solutions for HPC, AI infrastructures, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. we have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.

You will take part in the AI revolution led by us, working on cutting edge architecture.
Requirements:
What we need to see:

BSc in Electrical/Computer Engineering or MSc in Mathematics.

5+ years of relevant experience in chip design field (design/verification/formal).

Excellent analytical, logical reasoning and problem-solving skills.

Strong debugging and analytical skills.

Strong communication and interpersonal skills are required.

Ways to stand out from the crowd:

Formal verification work experience.

Knowledge of digital logic.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8193606
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26/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a highly qualified chip design engineer with a strong background in ASIC design to join our Chip Design Methodologies & Shared Code team. This team is responsible for developing best in class design methodologies, actively seeking for the best methods to develop design, developing shared code, providing design guidance, and driving the adoption of new technologies. It plays a key role in ensuring chip design teams operate efficiently and adhere to best practices. This role offers a great opportunity to think innovatively and make a significant impact within a dynamic, technology-focused organization.

As a Principal ASIC Design Methodologies Engineer, you will:

Develop and implement groundbreaking ASIC design methodologies that ensure flawless execution.

Drive exploration and adoption of next-generation tools, techniques, and workflows to meet the evolving demands of advanced semiconductor design.

Lead strategic initiatives aimed at redefining design practices, bringing cutting-edge methodologies to the forefront of the organization.

Collaborate with cross-functional teams to drive ambitious projects from concept to completion.

Influence and mentor other engineers, encouraging a culture of excellence and continuous improvement.

Ensure that the networking chip design team operates with maximum efficiency and the highest possible quality.
Requirements:
A BSc degree in Electrical Engineering or Computer Science.

Strong technical skills with 15+ years of hands-on pre-silicon design and methodologies.

Passion for innovation and a desire to bring new ideas to fruition.

Outstanding ability to drive projects and lead cross-functional teams.

Strong interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8193594
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer at NVIDIA Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.
Requirements:
B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.

8+ years of proven experience in RTL verification.

Background in Specman.

Knowledge of HDL (Verilog/VHDL).

A great teammate with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8193588
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