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looking for outstanding chip design Verification engineers to join our networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
come and take a significant part in designing and verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. 
what you will be doing:
join tel aviv group, working in a combined design and verification team which develops phy layer ip within the networking silicon.
build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
work closely with multiple teams within organizations such as architecture, micro- architecture, fw and post-silicon validation.

we are now looking for a senior chip design engineer to join our switch silicon team. as a chip design engineer networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! 
what you'll be doing:
work in a design/verification team which develops core units within the switch silicon.
micro-architecture of rtl verification environments planning for units and modules.
design rtl of units/blocks according to arch. specifications under challenging constraints with high orientation to power, area, and performance.
rtl synthesis, timing, supporting verification, and silicon post to activities.
work closely with multiple teams within organizations such as architecture, u-arch, full chip micro-architecture, be, and fw.

we are now looking for a best-in-class Verification engineer to join our outstanding gpu-networking silicon engineering team. as a dv engineer at gpu-networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry - gpu super-chip. 
what youll be doing:
work in a dv (design verification) team that has a global responsibility over deliverable units and clusters to the silicon gpu
integrations and full-chip models
verification of chip blocks/entities according to specifications under challenging constraints
ramp-up and run dv tasks on emulation platform

we are seeking a highly motivated high-performance system architect to join our team of experts and help shape the future of high-performance and ml / ai computing. our next-generation nvl systems will be at the forefront of connecting and powering the world's most advanced compute clusters, which would be used to train the most advanced ai models such as gpt and deepseek. as a high-performance system architect at nvidia, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.
what youll be doing:
define the nvl system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).
research various of solutions to enable the next large-scale-high-performance computing clusters. the position spans over various layers from algorithms, software, firmware, and hw.
collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

our company networking is a leading supplier of end-to-end ethernet and nvlink intelligent interconnect solutions and services for servers, Storage, and hyper-converged infrastructure. the company hw microarchitecture group is looking for an extraordinary solution architect to participate in helping our customers to get the maximum performance from our network products. the successful candidate will show strong background in chip design (arch, microarch, design, dv), excellent system view, ability to work independently, good communication and motivation to solve sophisticated problems.
 
what youll be doing:
help customers get the best performance from our products.
debug sophisticated customers issues.
come up with solutions for current and future products.
work with teams and customers from around the world.
partner closely with our field engineers and architecture.

we are looking for a senior chip design Verification engineer for developing the next generation dft technologies.
as a senior chip design Verification engineer in the dft team , you will verify the design and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and complex products. our dft solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for verification of the dft design, architecture and micro-architecture using sophisticated verification methodologies.
as a member of our dft verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (testbenches, bfms, checkers, monitors), execute TEST /coverage plans, and verify the correctness of the design.
collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

our company has been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people.
today, were tapping into the unlimited potential of ai to define the next era of computing. an era in which our gpu acts as the brains of computers, robots, and self-driving cars that can understand the world. doing whats never been done before takes vision, innovation, and the worlds best talent. as an our employee, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. come join the team that is building ai platform for operating ai factories to make a lasting impact on resilient operations of ai clusters.
what will you be doing:
you will bring together and understand internal and external customer requirements to improve ai cluster resiliency and design aiops-based solutions that address these needs.
develop automated workflows for issue detection and root cause analysis and closely collaborate with operators to debug sophisticated, Full-Stack ai cluster problems. we will bring to bear the findings for product improvements!
deliver compelling technical presentations and lead hands-on demos or training. you'll also handle evaluation deployments (poc/pov) and ensure smooth, reliable installations by staying engaged and encouraging throughout the customer journey.

as a Senior Software Architect in the gpu networking architecture team, you will define software defined networking architectural solutions. you'll also be part of a team of specialists who span across numerous technological fields related to the modern data center, such as distributed ai and deep learning systems, networking operating systems, virtualization, Storage, and more.
what youll be doing:
define system and software architecture for software defined networking (sdn) of ground breaking emerging ai networks which involves innovative software and hardware.
be an active member in setting the use-cases and metrics for monitoring complex high-speed networks control-plane.
work closely with various groups within nvidia to bring ai network technologies to reality, including gpu and switch hw and sw teams, product as well as fellow architects.

our company has been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. we seek an senior sw performance engineer to join our performance verification team. as a performance engineer at our company, you will have to work closely with our development and architecture teams responsible for ethernet ai solution and gain a deep understanding of our products and technologies.
what youll be doing:
participate in an international team of software engineers working on products for testing our products
build automated verification environment for high-end hardware and software which is at the forefront of innovation
identify, analyze, and report software defects, inconsistencies, and other quality issues.
drive improvements for performance, quality, stability around sw acceleration solutions.
stay up to date with industry standard methodologies, new technologies, and emerging trends in software verification.

we are currently seeking a power integrity engineer. you will collaborate closely with our teams in the usa and india, drawing on extensive knowledge, technologies, and tools. as part of our team, you will contribute to the development of our ethernet switch system product line, supporting the process from concept through design, implementation, verification, and release to customers. if you enjoy working with talented individuals to achieve ambitious goals, nvidia could be the ideal place for you. our team is dynamic, working with cutting-edge and unique technology. if youre someone who thrives on challenges, we invite you to join this diverse team and make a significant impact!
what you'll be doing:
ensuring robust power integrity in physical design to optimize power delivery
design and optimize physical design solutions for power integrity. 
perform power integrity analysis and mitigation. 
focal point for pi for partitions owners.
collaborate with hardware and design teams on power delivery strategies.
utilize tools and flow in advance technology to meet project development

we are seeking a senior deep learning Research Engineer for an excellent opportunity. this role provides an outstanding opportunity to engage in groundbreaking innovation and contribute to the advancement of generative ai technologies. you will work with pioneering methodologies and tools, crafting solutions that push the boundaries of ai capabilities.
 
joining our company means being part of a phenomenal team renowned for its inventions, such as large language models (llm's), and contributing to impactful work that influences various applications. we offer a collaborative environment that fosters professional growth. you will have the opportunity to collaborate with some of the brightest minds in the field, both within our global network and with leading companies worldwide, making this role perfect for those passionate about advancing ai technology and eager to make a significant impact on the future of the field.
 
what you'll be doing:
invent and build ground breaking techniques for efficient llm's and multi-modality models.
contribute to our ai enterprise software to ensure robust and scalable solutions.
collaborate with internal and external teams worldwide to drive research and development in llm's and multi-modal learning, using different professions and resources across the company.
partner with leading scientific organizations and industry pioneers to remain at the forefront of technological advancements and integrate the latest innovations into practical applications.

looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.

our company has been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. we seek an senior sw performance engineer to join our performance verification team. as a performance engineer at our company, you will have to work closely with our development and architecture teams responsible for ethernet ai solution and gain a deep understanding of our products and technologies.
what youll be doing:
participate in an international team of software engineers working on products for testing our products
build automated verification environment for high-end hardware and software which is at the forefront of innovation
identify, analyze, and report software defects, inconsistencies, and other quality issues.
drive improvements for performance, quality, stability around sw acceleration solutions.
stay up to date with industry standard methodologies, new technologies, and emerging trends in software verification.

looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.

our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. we make outstanding artificial intelligence happen and accelerate open-ais chat-gpt, for example. we believe in our people and products and seek excellent people to join us!
we're looking for a hardware u/architect for our switch division. in this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our next generation switch product lines performance, both ethernet and infiniband. your role will be cross-disciplinary, working with software, asic design, verification, physical design and platform teams to improve performance and debug.
what you'll be doing:
learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and Verification engineers.
define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.
define the implementation of debug capabilities to support performance validation and improvements
understand our system requirement and help define the por of our switch product line.
face the most challenging full-chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
thoroughly understand ethernet, infiniband and nvlink protocols.