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We are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing our groundbreaking and innovative chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join the Tel Aviv or Beer-Sheva group, working on RiscV processors platform.

Verification for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.

Daily work might involve any or all aspects of chip development including verification, integration, debug

Work closely with firmware and other groups around the globe.

We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the tools that shape the future of Chip Design and Verification. This role is at the intersection of software engineering and hardware design. Youll work on the software that accelerates the development of our industry-leading networking chips - highway for the AI revolution.

We're looking for someone who combines strong coding skills with preferably a solid understanding of chip design or verification. If youre excited about solving technical bottlenecks, building scalable tools, and collaborating with designers and verification experts, youll feel right at home here.

What youll be doing:

Develop software tools for our chip design and verification flows

Collaborate closely with designers and verification engineers to identify bottlenecks, propose improvements, and build software solutions that boost productivity and quality.

Own your solutions end-to-end - from idea to delivery to support.

We are looking for a Formal Verification Engineer for our NVIDIA Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our Switch team delivers world class Bridge and router solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. We have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.

We are looking for a Chip Design Manager to join our Networking team! As a Chip Design Manager in our Networking Business Unit, you will lead a team of highly skilled engineers responsible for verifying the next generation of our cutting-edge network products and GPU technologies. This is a unique opportunity to make a real impact at the heart of our AI and HPC revolution, while working in a fast-paced, innovative environment. You will join a passionate, experienced team working at the forefront of silicon verification - using advanced methodologies and tools to ensure design correctness for world-class solutions in data centers, high-performance computing, networking, and storage.

What You'll Be Doing:

Lead and grow a team of formal verification engineers focused on pre-silicon FV of complex digital designs.

Define and drive strategies and methodologies across multiple projects to prove design correctness and ensure quality.

Collaborate closely with Architecture, Design, and DV teams to identify verification needs and drive closure.

Provide technical guidance, mentoring, and support to engineers on the team.

Own planning and execution of verification deliverables to ensure high quality and timely tapeouts.

We are seeking an AI Networking Exploration Architect for our Networking Insights Group to bridge the gap between cutting-edge, hyper-scale AI workloads and the datacenter infrastructure that enables them. You will join a small, focused team of multidisciplinary engineers driving AI workload optimization through deep application understanding and end-to-end systems thinking. Your insights will directly shape our products across the full stack-from applications and software libraries to hardware architecture and physical design.

What You'll Be Doing:

Model the performance of complex AI workloads to identify bottlenecks and recommend system-level optimizations.

Translate state-of-the-art research into actionable infrastructure, software, and hardware features in partnership with architecture teams.

Rapidly master new AI domains (LLMs, generative models, multimodal systems) and distill key findings for product teams.

Incorporate your deep knowledge of AI applications into our hardware and software roadmaps.

Conduct independent research by formulating hypotheses about workload behavior and validating them through rigorous analysis.

Drive architectural innovation and network optimization by applying your domain expertise to exploratory analysis of real-world Deep Learning (DL) workloads.

We are looking for a Team Leader to build and run our Customer Facing Architects group focused on Spectrum-X in Israel. This team serves as the technical connection between our internal AI Networking compose group and our top customers. These include hyperscalers, cloud service providers, sovereign AI initiatives, and corporate AI solution developers rs.

What youll be doing:

Team Leadership, Build and guide a team of senior Spectrum-X customer-facing architects. Set technical direction, own hiring and mentoring, and establish clear roadmap for customer early engagement, onboarding and tracking lifecycle.

Customer Architecture & Technical Ownership, Serve as the senior technical authority for Spectrum-X deployments at hyperscalers, national AI programs, and enterprise AI factories. Drive E2E solution adoption, lead sophisticated technical architecture issues in the solution, and guide customers through configuration, tuning, and performance debugging at the NIC, switch, and fabric level. Convey customer's needs, and lead strategic PoCs and benchmarks to demonstrate Spectrum-X advantages.

Product Feedback, Turn field findings and customer difficulties into concrete feedback for R&D, ASIC, and software teams while partnering with AI Networking Architecture to make sure our deployment realities shape next-gen Spectrum-X design.

Work with Product Management to influence reference architectures and go-to-market strategy and represent Spectrum-X at customer briefings and industry events such as SC, OCP, and Hot Interconnects

We are looking for an experienced networking software engineer. An awesome candidate is highly technical who is also comfortable with dealing with enterprise customers. You will join a team of Solution Engineers focused on the Mellanox Networking, DGX Platforms, Container Orchestrators, Deep Learning containers, and other Enterprise related system software.

Solution Engineers spend approximately 50% of their time helping customers with their most complex problems and 50% of their time doing development related work. This individual should have proven grasp of datacenter and networking technologies, to provide comprehensive solutions for complex installations, maintenance, or operations for a broad scope of leading-edge networking products.

What you'll be doing:

Develop features and tools as part of solution engineering efforts to support all Enterprise Service offerings including, but not limited to Networking/switching products.

Work with our Enterprise customers and internal users to improve the availability, reliability, and overall experience of working with our Networking products.

Take ownership and drive customer issues with Ethernet or InfiniBand switch network deployments from inception to resolution.

Bring independent analysis, communication, and problem-solving to customer experience.

Collaborate with engineering to document, recreate and solve issues.

We are looking for an Operations Product Engineer to drive operational excellence across the full product lifecycle - from NPI transfer to mass production and legacy product support.
Key Responsibilities:
Legacy Product Ownership:
Manage and sustain legacy products throughout their lifecycle
Lead ECO processes from creation through implementation
Manage EOL activities, AVL updates, and second-source qualifications
Monitor component lifecycle, risks, and supply continuity
PLM & Documentation Control:
Maintain accurate product documentation (BOMs, drawings, work instructions, etc.)
Manage configuration control and documentation updates in PLM systems (Agile)
Ensure all production documentation is complete, approved, and current
NPI to Production Handshake:
Facilitate smooth transition of new products into mass production
Validate production readiness: BOM maturity, test plans, jigs, calibration needs, workflows
Work closely with R&D, NPI, Quality, and PE teams to ensure alignment
Collaborate with Contract Manufacturers (CMs) for implementation and verification
Production Support & Continuous Improvement:
Provide daily engineering support to production lines
Drive improvements in yield, cycle times, and work instructions
Support root-cause analyses and CAPA activities
Identify and implement process optimization opportunities and cost reduction
Test Equipment Management:
Manage test equipment and documentation for ATE test equipment
Ensure test stations and fixtures meet readiness standards
Coordinate preventative maintenance with internal teams and CMs.

We are looking for an NPI Product leader that will be responsible for transitioning new products from early stage development to production level till field deployment processes
Main areas of responsibility:
Work with cross functional teams ranging from HW designers, systems engineers, marketing and operations teams and participate in the complete product life cycle from development through build prototype until handing off the product to sustaining engineers.
The NPI product leader will manage all engineering related activities of our new products. The NPI PL will have a full responsibility on the overall operational activities to ensure qualified manufacturing readiness of new products.
Lead cross functional teams to execute the NPI process within the operations group.
Set an overall Operational NPI plan, Set Ops KPIs, Track and follow project progress, manage risk and report accordingly.
Define the NPI methodologies, interfaces, and process within the operation matrix to ensure smooth product introduction

Providing engineering leadership for the definition and scoping of NPI projects for all aspects of manufacturing and transitioning of projects to Manufacturing for project implementation and subsequent operation.
Ensure Design for Manufacturing guidelines are well implemented in the product design and validate implementation impact on product quality
Overall accountability of production data integrity including: BOM, production documentation, jigs and tools, product regulation.
Establishing and documenting process specifications that ensure manufacturing operations will meet product capability and quality expectations.
Analyze and recommend improvements to all production processes and methods to facilitate cost reduction and quality improvement through engineering change requests
Prepare plans for all NPI projects and coordinate with all stakeholders to ensure a good quality product - represent the operations in the product life cycles gates
Serve as a technical mentor to contract manufacturing during NPI process.

Required Micro-Architect
Description
A global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of the company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.

We are looking for an excellent design engineer to join our team and build our state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface.

We are seeking an exceptional architect to join our architecture team and shape the future of quantum control. We have a unique opportunity to shape the architecture of next-generation quantum computers toward utility-scale quantum computing.
In this role, you will define the logic architecture of the devices that are the heart of the next-generation quantum control platform. Designing the devices, including the pulse processor and their interfaces, requires a deep understanding of quantum computing, the system tradeoffs, and product requirements.
In this role, youll collaborate with Product and with the other members of the architecture team to define the requirements and the roles and responsibilities of each component. Youll identify system-level tradeoffs and identify solution alternatives. Youll work closely with the logic design and compiler teams to define a winning architecture.
Responsibilities: 
Architecture for the next-generation quantum control platform devices, ASIC, and logic components.
Define system-level architecture and features, providing detailed specifications to the various R&D teams.
Collaborate with the product and research teams to transform high-level requirements into architecture and spec definitions, and present tradeoffs.
Work with partners and vendors on requirements, integration architecture and joint development to optimize the product capabilities.

Join us and become a pivotal part of our Networking Silicon engineering team in Tel Aviv, Israel. We are renowned for developing the industry's top high-speed communication devices, known for their outstanding efficiency and minimal latency. This role offers an outstanding opportunity to be involved in groundbreaking projects, collaborating with versatile experts to foster innovation and excellence. As a Senior Chip Design Verification Engineer, you will be immersed in a dynamic and encouraging environment where your efforts will have a meaningful impact.

What you'll be doing:

Play a crucial role in developing our next-generation chip controller.

Engage in building and verification tasks within a challenging, multi-disciplinary context.

Collaborate closely with cross-functional teams to advance our networking and GPU networking chips and systems.

Drive the implementation of sophisticated verification environments to ensure flawless functionality.

As a DSP Communication Engineer, youll join a world-class team dedicated to developing the next generation of high-speed communication systems. This is a powerful opportunity to work on modern technology and make a significant impact in a dynamic and collaborative environment!

What you'll be doing:

Architectural and technical build of very high-speed wireline links.

Collaborate with peer engineers to ensure that product requirements, goals, and objectives are met or exceeded.

Join development efforts to build DSP architecture for future chips and improve the functionality of currently shipping products.

Work in a diverse, dynamic team to successfully implement advanced communication solutions.

Determine key technical requirements and deliver flawless system performance.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing full-chip physical design methodologies, Physical Verification development and support through all the projects, Tapeout activities for implementation of networking chips and SOCs.

Work closely with Full Chip Layout owners and block owners, project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art FCL physical design problems that are needed for our chips.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

Participating and developing flow and tool methodologies for fullchip, physical design verification across multiple projects.