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We are looking for an experienced hands-on software engineer and compiler technology expert to join our Future-Computing-Infrastructure expert group. The group designs and develops technologies for the next-generation data center aimed at accelerating applications, optimizing compute resource utilization, and reducing data-center costs. Our projects involve hardware and software architecture co-design. They require high-level system understanding, creativity and innovative thinking.
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!

Required Senior Memory Subsystem Architect
Job Description
Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Required CPU Core Architect
Job Description
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Required CPU Core Architect representative
Job Description
The CPU core Architect representative will be a member of the processor core architecture team. He will be responsible of the technical communication between the team in Israel and the team in China. He will be presenting and explaining Microarchitecture features developed by architects in Israel, collecting requirements, answering question. He will be responsible to hold deign reviews with the team in China. He will also be proposing new Micro architecture features based on his own ideas. take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products. The CPU core architect representative would be relocating to China for an extended period after getting familiar with the team in Israel.

Required Senior CPU Core Architect
Job Description
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Required CPU Core Micro Architect
Job Description
Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

We are currently looking for a Performance Simulation Expert develop and evaluate next generation performance features as well as develop the future generation of our Compute system simulation infrastructure, models and analysis tools
Responsibilities:
Develop and analyze performance and power features in our cycle accurate pre-silicon model and improve the accuracy of the current Server system simulator
Design the architecture of the new generation system simulation platform that will be used to analyze performance of Server (Compute and AI) workloads and identify performance bottlenecks
Develop new technologies, methodologies and tools for simulation. Analysis and debug of applications and workload on Huawei servers
Propose and simulate optimizations and innovations on the HW and SW in order to improve server performance for given workloads
Distribute the simulation platform, train and support other teams in China and in Europe using the simulation platform, technology and methodology.

We are looking for an experienced and creative AI processor VLSI Architect to architect and model the core of our next generation processors.

Required Senior Hands-On Gen.AI Infrastructure Expert
Role Overview
As a Senior Gen.AI Infrastructure Engineer in our AI innovation team, you'll play a crucial role in advancing our LLM infrastructure capabilities, focusing on research, implementation and optimization of state-of-the-art solutions for model deployment and serving
What will you be doing?
Explore new directions and seek new opportunities for innovation through academic / industry trends tracking
Design and implement advanced optimization techniques for transformer-based models
Conduct research and stay current with academic developments in LLM optimization
Drive architectural improvements for large-scale model serving systems
Develop and optimize infrastructure components using PyTorch and other frameworks
Implement and optimize model serving solutions using frameworks such as vLLM, TGI, and MindIE
Collaborate with cross-functional teams to improve system architecture and performance.

Required Senior HW architect
About the group:
Highly experienced Group in switch processing including HW and SW architecture with deep background in the high-speed networking world. Our innovative packet processors are designed into the most advanced data centers by tier-1 vendors.
What will you be doing?
Definition of our next generation Packet Processor/Datapath/congestion management architecture for high-performance complex SoC Ethernet Switch.
Define the architecture from requirements to production.
Architecture & micro-architecture definition for the systems and its blocks.
Support the development group by delivering specs.

Required Senior Core Power Management Architect
Job Description
Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.
Responsibilities
Responsible for bringing Huawei CPU to a leading position in Performance-Power efficiency.

Our Finance team is looking for a payment specialist to be part of the payment team in Israel (the company is located in Hod Hasharon)
As key positions for treasury security department, perform accurate, high quality and compliance payments and receive in a timely manner, ensure compliance with companys policies and procedures.
Prepare payment data and process payments on different e-banking platform, including supplier payments, employee payments and so on;
Process intercompany treasury settlement transfer and funds receiving confirmation;
Make sure payment success and solve abnormal problems during payments;
Analyze rejected payments and unidentified refund, identify root cause and resolve issues;
Provide documentation for bank inquiries and for internal audit purposes;
Management e-banking access and Token, to ensure permission is valid and fulfill internal
Requirements
Assist in the provision of bank statements;
Assist in the management of Direct Debit;
Establishment and updating of payment rule book guidance;
Support and perform necessary cooperation for accounting team month closing;
Proactively monitor payment processes, identifying non-standard activity and escalating to management;
Establish good relationship with banks and internal department to process payment better;
Manage operation problems, report the found non-conformities and problems in time, and ensure the problem follow-up and closure;
Manage finance-related work, including expense analysis, financial report analysis, etc.
Economic, fiscal and taxation, foreign exchange insight and analysis.
Assist with other finance and accounting department tasks as needed.

Looking for a CPU Architect with expertise in HW/SW codesign of dense computational logic (e.g., vector, matrix)
The role includes but is not limited to:
Analysis of technical challenges in relevant use cases and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions in cooperation with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts.
(Preferably) models CPU functionality, performance and power in simulators.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

Looking for a CPU Architect for codesign of HW/SW feature for our CPUs for cellphones and servers.
The role includes but is not limited to:
Analysis of technical challenges and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Invens corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions (when applicable) in coordination with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts. (the HW/SW features are typically in the form of new instructions or of other Instruction Set constructs and belong to one of following domains: dense compute, general purpose accelerations, use case specific accelerations, system level instructions, Security related technologies, or instrumentation instructions.
Models CPU functionality, performance and power in simulators, analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

Were looking for a highly organized, detail-oriented Open Innovation Coordinator to join our Technology Planning team. This entry-level role is ideal for candidates with strong analytical skills, clear communication, and a background in software-hardware co-design or computer architecture research. Youll support the Technology Planning Manager and team by analyzing technical trends and helping identify new technologies and collaboration opportunities to advance our innovation strategy.
Key Responsibilities:
Conduct deep-tech research, reviews and analyse on emerging technologies using academic, market, and industry sources.
Track developments in areas such as AI infrastructure, AI Data Movement and other related areas.
Synthesize findings into clear, concise internal summaries and presentations.
Support project coordination: timelines, deliverables, and cross-team communication.
Prepare for and participate in international meetings, including collaboration with China-based and European teams.
Manage logistical and administrative tasks for innovation team.