we are seeking a skilled FPGA Engineer with strong capabilities in system and hardware-level design.
The engineer will play an integral role , requiring an experienced, self-driven engineer with great initiative.
The individual will be responsible for selection, development, and integration of FPGAs that implement functionality on prototypes: spanning from low-level hardware control & status for embedded systems, to high speed links, to high level IP blocks, to custom hardware-accelerated algorithms & filters.
This role offers an incredible opportunity to work with and learn from world-class experts in multiple disciplines, while working on exciting design applications.
Requirements: Experience and strong foundations in digital design and communications.
3+ years of experience developing embedded systems with:
Micro-controllers, microprocessors (ARM), computers.
Processor peripheral interfaces (USB, I2C, SPI, storage, high speed serial I/Fs).
Experience with industry-standard protocols (PCI Express, USB, Ethernet, etc).
Experience with board bring-up and debug of digital hardware.
Minimum Qualifications:
Proficient in Verilog RTL language
Experienced with large FPGA development on Altera or Xilinx devices
Very familiar with Altera's or Xilinx's build flow including design entry in Verilog, synthesis, place and route, timing constraints and timing closure
Hands on with lab FPGA debug methodologies, such as ChipScope, SignalTap or others
Hands on experience with lab debug equipment, such as oscilloscopes and logic analysers
Experience with verification methodologies, RTL and gate level simulations and debug
Experience debugging silicon and PCB issues
Excellent communication skills and demonstrate the desire to take on diverse challenges
Preferred Qualifications
Experience with HAPS platform and tools flow (Synplify/Certify)
ASIC Design/Verification experience
Able to write scripts in python, perl or other scripting languages
Software skills in C/C++
BSc/ MSc in Electrical Engineering/ Computer Engineering
This position is open to all candidates.