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Our team at the Huawei Computing Network Innovation Lab is looking for exceptional talent to join us and lead the development of next-generation data centers. We create cutting-edge technologies that synergize software and hardware in tandem to accelerate compute, storage, and networking at large scale. We aim to drive innovation and deliver software-defined infrastructure and algorithms for HPC, AI/ML, and Big Data applications.
We are looking for an outstanding Research Team Lead with deep hands-on expertise in large-scale distributed systems, AI framework infrastructure, and performance optimization on custom accelerators. If you are a visionary technical leader, a skilled communicator, and a team builder who thrives at the frontier of systems and AI research - you're welcome on board.

What Will You Be Doing?
Lead and grow a world-class team of researchers and engineers working on distributed AI infrastructure and systems software.
Architect and own the software infrastructure enabling distributed training and inference on Huawei's custom accelerator hardware (e.g., Ascend NPU).
Drive research and development on communication libraries, runtime systems, memory management, and graph execution & synchronization at scale.
Optimize end-to-end performance across large-scale clusters, covering both scale-up (multi-device) and scale-out (multi-node) configurations.
Design and implement high-performance communication backends and collective operations (AllReduce, AllGather, broadcast) for distributed training workloads.
Collaborate cross-functionally with hardware architects, compiler teams, and framework engineers to co-design hardware-software solutions.
Publish and present research findings at top international venues (NeurIPS, EuroSys, SC, MLSys, OSDI) and represent the team externally.
Mentor engineers and researchers, conduct performance and growth reviews, and shape team culture and technical direction.
Partner with top academic institutions and open-source communities to advance the state of the art in distributed AI systems.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

*Part-Time or Full-Time Opportunity

In this job opening, we are seeking a highly motivated and visionary researcher to join our team focused on chiplet-based computing systems. This role involves research and development in chiplet-based architectures, aiming to overcome performance and scalability limits of traditional compute platforms.

Responsibilities:
Conduct cutting-edge research on the co-design of communication and computation for wafer-scale systems. On the communication side, the work focuses on architecting Networks-on-Chip, providing scalable, high-bandwidth, and ultra-low-latency interconnects that efficiently span multiple dies and support fine-grained data movement. On the computation side, the research emphasizes optimizing and mapping training and inference workloads to fully exploit wafer-scale resources, improving performance, scalability, and energy efficiency through intelligent task placement and scheduling.
Investigate various aspects of system design, including:
Network-on-Chip design, further including Topology exploration, routing algorithms, and protocol/flow-control design to support high-throughput collective communication, low-latency synchronization, and efficient model/data parallelism
Expressing and Mapping LLM Parallelism to Wafer-Scale System that simplify LLM parallelism (e.g., tensor, pipeline, and data parallelism) and efficiently map training and inference workloads onto wafer-scale system

We are looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc.
The minimal tasks of this role are:
1. Modeling of new memory related architectural features in the existing CPU performance simulator
2. Development of performance tests or adaptation of existing workloads to be suitable for simulation
3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip
4. Develop analysis, conclusions and recommendations based on the above activities
The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!

Our company is seeking a Hardware Development Team Lead to lead cross-functional development and integration activities across the organization. The successful candidate will oversee collaboration between all engineering disciplines, including Hardware, RF, Software, and Firmware, while serving as the key interface with the Systems Engineering team.
Key Responsibilities:
Lead and directly manage a multidisciplinary engineering team developing complex systems, including Mechanical, Hardware, Firmware, and RF engineers, ensuring execution according to project plans, schedules, and objectives.
Lead end-to-end product development, including system architecture definition, technical oversight, prototype development, and design verification and validation (V&V).
Serve as the primary liaison between development engineers, the Systems Engineering team, and Project Managers.
Evaluate, introduce, and implement new development tools, methodologies, and emerging technologies.
Define priorities and allocate engineering tasks based on business needs, project requirements, and market considerations.
Establish engineering methodologies, development processes, project milestones, and required deliverables for internal design reviews (PDR, CDR, etc.).
Define engineering roles and responsibilities, recruit new team members, mentor engineers, conduct performance evaluations, and develop individualized professional growth plans.
Conduct routine management activities, including status meetings, management reviews, and project progress meetings.
Prepare technical responses for project tenders (RFPs), including technical proposals, effort estimation, and cost evaluation.
Provide technical support for both internal engineering challenges and customer-facing technical issues.
Lead internal and customer design reviews as required.

We are looking for an experienced FPGA Firmware Developer to join our advanced R&D team and take part in the development of complex, multidisciplinary systems.
We are looking for someone who is passionate about FPGA development, enjoys solving complex engineering challenges, and is eager to continuously learn and grow in a cutting-edge technology environment.
Responsibilities:
Design, develop, and integrate FPGA-based solutions for advanced embedded systems.
Develop RTL using VHDL, Verilog, or SystemVerilog.
Work with AMD (Xilinx) and Intel (Altera) FPGA development and simulation tools.
Design and implement high-speed digital interfaces, including DDR, PCIe, Ethernet, SERDES, and more.
Develop and integrate SoC-based solutions.
Perform FPGA bring-up, debugging, validation, and system integration.
Collaborate closely with hardware, software, and system engineering teams.
Prepare interface specifications, technical documentation, and APIs.

We are looking for a talented Hardware Board Designer to join our multidisciplinary R&D team. This is an exciting opportunity to take part in the design and development of advanced electronic systems, working alongside hardware, firmware, software, and system engineers from concept through integration.
We are looking for a creative, hands-on engineer with a passion for hardware design and a desire to work on cutting-edge technologies.
Responsibilities:
Design and develop complex electronic boards from concept to production.
Perform hands-on schematic design and component selection.
Support and guide PCB layout activities.
Prepare and present design reviews.
Collaborate closely with firmware, software, RF, and system engineering teams to ensure successful system integration.
Develop advanced multidisciplinary systems incorporating:
CPUs / SoCs
FPGA-based designs
Analog and mixed-signal circuits
High-speed interfaces (DDR, PCIe, Ethernet, LVDS, etc.)
RF transmit and receive chains
Filters and amplifier circuits
Power supply and power management circuits
Support board bring-up, debugging, validation, and troubleshooting.

abra professional services is seeking a talented Aeromechanical Engineer If you are looking for a meaningful technological journey filled with multidisciplinary challenges, come and be a part of our story. As an Aeromechanical Engineer, you will join our Aeromechanics Team within the Platform Development Division at the company’s Modi'in site. Key Responsibilities:
* Participate in the mechanical design of airborne structures, mechanisms, and aircraft systems.
* Drive end-to-end development and validation, from initial conceptual design through to mass production.
* Improve, optimize, and upgrade existing operational products.
* Oversee production accompaniment, environmental/flight testing, and the preparation of detailed engineering drawings.
* Author technical requirements, design specifications, and engineering reports.

We are looking for an experienced FPGA Design Engineer who will play a pivotal role in developing , designing and optimizing FPGA solutions for our cutting-edge projects. Your expertise will drive innovation and excellence in digital design as part of the detection team in CT\AMI.

Your role :
Develop FPGA logic using VHDL / Verilog.
Design and implement high-speed data paths and interfaces such as DDR, PCIe, Ethernet.
Perform simulation, verification, timing closure, and debugging.
Integrate FPGA with soft processors (such as MicroBlaze / Nios), sensors, ADCs/DACs, and other system components.
Support system bring-up, lab validation, and debugging at both board and system level.
Collaborate closely with hardware, firmware, software, and system teams.
Support and participate in architecture discussions and design reviews.
Read and understand board schematics to support integration and troubleshooting.
Perform lab and system-level testing after component changes or design updates.
Document FPGA design, interfaces, and implementation details.

We are looking for an experienced Board Design Engineer to support the design and development of complex mixed-signal and high-speed digital boards for advanced medical systems. You will join our multidisciplinary team in CT organization.


Your role :
Design and develop multi-layer high-speed PCBs and define layout constraints.
Perform component selection and schematic design.
Design power management circuits (including DC-DC converters and power distribution).
Design and support analog circuits and boards.
Support EMC/EMI tests.
Lead board bring-up, validation, and lab debugging. Troubleshoot system-level HW/FW issues.
Support high-speed interfaces such as DDR4/DDR5, PCIe, and Ethernet.
Support Install Base (IB) activities , field investigations, and NPI activities.
Support Lifecycle Management (LCM) tasks, including EOL handling.
Work with PCBA vendors on production, manufacturing issues, and yield improvements.
Search for component alternatives, test and approve replacements.
Work with PLM (Product lifecycle Management) system and support ECO creation and release.

As a Senior R&D Process Development Engineer , you will play a key role in a multidisciplinary engineering team driving the design, development, and launch of next‑generation manufacturing platforms that enable future CT detector technologies. You will work closely with design and hardware teams to translate breakthrough concepts into scalable, automated production processes that deliver reliability, precision, and manufacturability at scale.

Your role:
Team Collaboration: Work as a key member of the R&D process team to develop, test, and implement automated assembly solutions for future products.
Process Development: design and optimization of new automatic assembly lines, specifically for high-precision CT detector modules.
Hands-on Implementation: Support the integration and fine-tuning of Die Attach systems and Epoxy/solder Dispensing processes within the R&D lab and pilot lines.
DFM Support: Participate in design reviews to provide DFM (Design for Manufacturing) insights, ensuring that new detector designs are optimized for assembly.
Technology Evaluation: Assist in benchmarking and testing new manufacturing technologies and equipment to determine their feasibility for future product lines.
Validation & Documentation: Execute DOEs (Design of Experiments) and document process characterization as part of the teams effort to meet medical regulatory standards.

This role is suitable for engineers in early stages of their career, with strong hands‑on orientation and willingness to grow into broader system responsibilities. The Mechanical Engineer is responsible for mechanical design and development of components & sub- assemblies within the complex detection systems for CT machines. You will progressively take full ownership of end‑to‑end mechanical deliverables, ensuring design quality and robustness throughout the entire product lifecycle. This includes responsibility from initial concept and preliminary design through critical design, prototyping, manufacturing transfer, and ongoing production support.

Your role:

Perform mechanical design - CAD models, drawings, prototype manufacturing, and production transfer

Perform mechanical calculations and analyses including hand calculations, tolerance analysis, and basic FEA

Perform testing, troubleshooting, and documenting of mechanical units/subsystems of small to medium scope

Prepare engineering documentation - specifications, drawings, test reports

Analyze and propose mechanical solutions to DMS subsystem challenges. Ability to evaluate & define the design correction - when needed

Under guidance of senior engineers and management, actively participate in system‑level design reviews and integration, contributing mechanical input.

We are seeking an experienced and self-driven Systems Engineering Functional Manager to lead our systems engineering team for our CT/AMI detection platform (DMS). This team is responsible for the full lifecycle of system-level development from systems design, requirements management, architecture design, execution of technical reviews, setting the integration plan to verification, validation, and regulatory compliance.

Your role:
Lead and mentor a multidisciplinary systems engineering team, fostering growth, collaboration, and technical excellence.
Provide strategic and hands-on technical guidance in the development of CT/AMI detection platforms.
Oversee engineering planning and execution to support complex project ensuring timelines and quality standards are met.
Resource assignment and prioritization including headcount and budget management.
Working across functions and team boundaries to define, design, and implement the next generation of products.
Decision making in cross-disciplinary and architectural aspects.
Drive continuous improvement in engineering and systems engineering processes and tools.
Support audits and regulatory inspections as a subject matter expert.
Represent DMS System Design in global engineering forums and initiatives.

In this role, you will lead all mechanical aspects of the product in R&D projects, taking it from concept to full scale development while working with multidisciplinary teams that include system engineering, physics, electronics, software, project managers, and others. You will serve as a technical focal point for mechanical design decisions, balancing performance, manufacturability, reliability, and cost.

Your role:

Lead the mechanical design including 3D models, drawings, prototype manufacturing, and production transfer.

Provide solutions that optimize performance, service, manufacturability, and cost.

Perform required analysis, testing, troubleshooting, and documentation.

Work with local and global teams inside and outside Philips to answer design, service, and production challenges.

Own mechanical risk identification, mitigation plans, and design reviews.

Operate in a multidisciplinary environment under conflicting constraints of performance, reliability, cost, and development schedule.

Required Staff RTL IP/Component Design Engineer, Cloud
About the job
In this role, you will contribute in all phases of complex application-specific integrated circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis and etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next-generation of our platforms, we make product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Define the block level design document such as interface protocol, block diagram, transaction flow and pipeline, etc.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, and VHDL), function/performance simulation debug and Lint/CDC/FV/UPF checks.
Support synthesis, timing/power closure, and Field Programmable Gate Array (FPGA)/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.