לוח משרות דרושים חשמל ואלקטרוניקה בחיפה

Requirements:
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

Preferred Minimum Qualifications:
2-7 years of significant logic design engineering experience.
Knowledge in digital design domain, preferably from the field of ASIC design front end activities.
Hands on experience in micro-architecture definition from specification, RTL development and debug.

Preferred Qualifications:
Experience in RTL implementation in image processing domain (pixel processing, filters, convolution).
Experience in scalable design implementation (definition and coding).
Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.
Ability to work in a team.
Ability to understand system wise aspects like interaction of HW with SW and FW.

Requirements:
PhD or MSc in computer science/EE or area related to computer architecture, or equivalent research experience in industry
At least 15 years of relevant research and development experience in industry and academia in the following areas:
- Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
- Workload characterization and analytical model generation
- System Modelling and emulation of HW
- Simulation of Software workloads and Software applications on HW simulator
Ability to provide innovation and an international vision
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners
Excellent oral ability to provide innovation and an international vision
Excellent communication, presentation and reporting skills
Excellent oral and written English. written English.

Requirements:
Mandatory:
6+ years of experience as a software or system engineer in the field of Wi-Fi
B.Sc./M.Sc. in Computer Science, Computer Engineering, Electrical Engineering or other related field
System view and profound understanding of 802.11 protocol and Wi-Fi MAC layer
Hands-on C & C++ experience
Team player with good interpersonal and communications skills
Self-motivated and able to work independently
Advantage:
Hands-on Python experience
Experience in Linux based development environment
Knowledge or experience with network simulation tools (ns-3, OPNET Modeler etc.)
Experience with design / development of 802.11 performance oriented algorithms (e.g. high throughput, low latency, low jitter, rate selection)
Good understanding of 802.11 PHY and MAC/PHY interfaces
Good understanding and experience with IP and IP protocols (TCP, UDP, QUIC etc.).

Requirements:
REQIRED
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
REQUIERD
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Good understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store units, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory controller.
Good understanding of high speed digital VLSI design flow and methodology
Understanding of trade-offs between power, performance and area appropriately to meet the requirements of the product.
At least 6 years of experience in one of the leading CPU companies
Familiarity with the ARM\IA architecture and the micro-architecture for current ARM\IA CPU cores.
Software development (C, assembly).
Hands on experience as a Front end ASIC designer
DESIRED
Co-operate and communicate well with the architecture team and other members of the development.
Excellent verbal and written communication skills.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
B.Sc. in Electrical Engineering (or equivalent academic degree)
10+ years in VLSI design (less can be accepted in case of a unique candidate).
At least 5 years as Architect.
Ability to make trade-offs between power, performance, and area appropriately to meet the requirements of the product.
Experience with AI - Mandatory.
Advantages:
Experience with High level design languages like System-c an advantage.
Hardware accelerator development.

Requirements:
Requirements:
3+ years of professional development experience in C/C++ with multiple shipped software projects.
Strong problem-solving and debugging skills.
Experience with low level SW interfacing and interacting with HW.
BA/BS in Computer Science, Electrical Engineering or related field.

Prefered Qualifications:
Experience with networking protocols and/or data storage systems.
Experience with multithreaded design and debugging.
Experience with virtualization technologies and architecture (SRIO-V, Hyper-V).
Experience with validation of hardware, ASIC or FPGA.
Familiarity with Windows internals and WinAPI and/or Linux internals, DPDK

Requirements:
BASIC QUALIFICATIONS
- BSc student of Computer Science / Computer Engineering / SW Engineering / Electrical Engineering (with at least 2 semesters left before graduation). Please include a grade sheet/academic transcript along with your CV in a single PDF when submitting your application.
- C development and debug Very good communication skills

PREFERRED QUALIFICATIONS:
- Fluent English.
- Available for 2-3 work days per week.

Requirements:
BASIC QUALIFICATIONS:
- Electrical/Computer Science engineer.
- knowledge of object-oriented programming concepts.
- knowledge of Verilog/SystemVerilog/Specman.

PREFERRED QUALIFICATIONS:
- Knowledge of Hardware Verification concepts and tools (UVM , Coverage Driven verification).
- Knowledge of the following programming languages: Perl/Bash/TCl/Python.
- Knowledge of PCIe, Processors, Ethernet, DDR.

Requirements:
You're the right fit if you have:
Bachelor's degree in Electrical Engineering.
A minimum of 10 years of experience in FPGA design in a multidisciplinary industry.
Strong understanding of digital design concepts, clock domains, timing closure, and power optimization.
Ability to create clear and concise design documentation, including design specifications, test plans, and implementation details.
Board design experience and good understanding in schematic, PCB layout, signal integrity analysis, and knowledge of industry standards such as DDR,etc.
In-depth knowledge of FPGA architectures from vendors like Xilinx, Intel (formerly Altera) and signal processing algorithms and techniques for implementing functions efficiently on FPGAs.
Knowledge and experience with high-speed serial interfaces (such as: Ethernet, DDR) and protocols like AXI.
Ability to design and integrate FPGA design into larger systems including interfacing with other hardware components and microprocessors and HW-SW interfaces.
Knowledge and experience in tools/mythologies such as Vivado, Quartus, UVM, and implementation, testing and debugging methods.
Mastery of HDLs like Verilog or VHDL for designing and implementing complex FPGA designs and architectures.
Proficient in debugging techniques and tools for identifying and resolving issues in FPGA designs.
Strong communication skills to effectively collaborate with cross-functional teams including hardware engineers, software engineers, and system engineers.

Requirements:
BSc in Computer Science
Experience as software engineer, CAD engineer experience is a strong advantage
Experience Python & Unix
Strong organizational skills
Excellent attention to detail
Ability to work in a dynamic, complex and ever changing environment
Advantages:

Experienced in C++
Understanding of Chip Design concepts
Experience in design automation on top of EDA tools solutions
Experience in TCL
English proficiency
Responsibilities

Develop quality and efficient code and create unit tests
Maintain agile software development practices
Provide Costumer Support for external and internal clients

Requirements:
* M.Sc. or equivalent work track experience in CS, EE, Physics, or other quantitative field from a leading university. Ph.D. - Advantage.
* A proven track record of at least 5 years hands-on experience in developing deep learning algorithms Experience/knowledge in computer vision and image manipulation algorithms, Segmentation and classification.
* In-depth, hands-on knowledge of deep learning fundamentals.
* Hands-on experience with deep learning frameworks such as PyTorch - Must
* Strong mathematical aptitude, with emphasis on probability, vector algebra, and geometry.
* Proficiency in Python programming.
* Experience in conducting long-term development and/or research projects, in either academia or industry.
* Proficiency in English, both written and spoken.
* Availability for a full-time position from Imagrys office HQ in Haifa.
Skills that are considered an advantage: Experience in Object Detection
* Publications in top-tier journals or conferences on algorithms, computer vision, or deep learning.
* Basic proficiency in C ++.
* Experience with Linux.
* Source control with git.

Requirements:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
Preferred Minimum Qualifications:
* 2-7 years of significant logic design engineering experience.
* Knowledge in digital design domain, preferably from the field of ASIC design front end activities.

* Hands on experience in micro-architecture definition from specification, RTL development and debug.

Preferred Qualifications:
* Experience in RTL implementation in image processing domain (pixel processing, filters, convolution)

* Experience in scalable design implementation (definition and coding)

* Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.
* Ability to work in a team.
* Ability to understand system wise aspects like interaction of HW with SW and FW