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Required Machine Learning Hardware Architect, Hardware, Software Co-Design, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Machine Learning Hardware Architect within the Co-design team, you will serve as a technical lead bridging model architecture innovation and next-generation hardware design. Operating at the highest levels of AI research and engineering, you will define the goal and architectural roadmap for our future machine learning serving and training capabilities. You will guide the integration of ML research such as massive-scale foundation models with advanced silicon architectures to create industry-leading, high-performance, and power-efficient accelerators.
Responsibilities
Define and drive the technical roadmap and architecture for the hardware/software stack to ensure exceptional performance for ML models. Act as the technical liaison across research, software, and hardware teams, steering model architecture innovation to maximize scaling, quality, and hardware efficiency.
Architect next-generation configurable simulation frameworks and performance models, setting the organizational standard for evaluating complex microarchitectural decisions. Drive high-stakes choices regarding Power, Performance, Area (PPA) and buildability for future chip and system architectures, expertly balancing long-term technological trends with strict product delivery timelines.
Guide system-level performance analysis across highly distributed ML systems, innovating new methodologies to optimize and balance compute, memory bandwidth, and inter-chip network requirements. Their leadership will directly shape the future of high-performance AI infrastructure and hardware-software co-design.
Manage cross-functional partnerships across hardware, compiler development and ML teams.

Required ChipDev CAD Engineer, Hardware, Cloud
About the job
Cloud's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our Cloud's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. You will anticipate our customer needs and be empowered to act like an owner, take action and innovate. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
You will have the opportunity to find the perfect blend of software design practices and hardware development complexity. Whether your strength is in software coding, with a good understanding of hardware, or you are a hardware engineer with software proficiency, this balanced role will let you shine in both disciplines at the same time.
Cloud accelerates every organizations ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage our technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Cloud as their trusted partner to enable growth and solve their most critical business problems.
Responsibilities
Manage project priorities, deadlines, and deliverables. Design, develop, test, deploy, maintain, and enhance software solutions.
Create software solutions that improve the hardware design process through automation. Propose, design, and implement software automation that directly addresses bottlenecks in today's ASIC and SoC EDA flow.
Work directly with the hardware team on projects prototype and then deploy tools to make a positive impact on our chip hardware development process. Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
Triage product or system issues and debug/track/resolve by analyzing the issues and the impact on hardware and quality.

Required Staff Embedded Firmware Engineer, High Speed DSP
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Staff Embedded Firmware Engineer for High-Speed DSP, you will architect and define the low-level firmware and control loops powering the world's most advanced physical-layer communications silicon. Sitting at the critical intersection of digital signal processing (DSP), hardware-software co-design, and real-time systems, you will lead the development of adaptive algorithms, error correction (FEC), and link-telemetry frameworks. Your work will directly bridge the gap between high-performance hardware pipelines and our planetary-scale AI infrastructure, transforming complex communication systems theory into reliable, real-time silicon execution.
Responsibilities
Define the long-term firmware roadmap and hardware-software partitioning for physical-layer interfaces, determining the optimal balance between hardware-fixed logic and programmable firmwarm.
Architect advanced "in-situ" monitoring systems and firmware-driven diagnostics to track physical-layer link health, Bit Error Rate (BER) trends, and channel quality across millions of ports in real-time.
Design, model, and implement bare-metal or RTOS firmware to control high-speed transceivers, managing real-time adaptive loops, clock and data recovery (CDR), and physical-layer calibration.
Partner with TPU Systems, Networking Software, and High-Performance Computing (HPC) teams to ensure silicon firmware integrates seamlessly with global cluster management and collective communication frameworks.
Identify and de-risk hardware-software interface bottlenecks (e.g., register maps, driver latencies, and boot-up sequencing) that impact our AI infrastructure.

we are looking for a AI Applied Scientist - Insights & Recommendations.
As AI Applied Scientist, youll be at the intersection of advanced technology and meaningful impact with clear business cases. You will have access to real-time (RT) big data from multiple Sensors & Data sources, and a chance to discover, explore research, and develop cutting-edge models that directly impact industrial manufacturers around the globe. As part of the Applied AI/ML Science team , you will have the opportunity to continuously grow and learn while building and deploying advanced models directly into our products, and stay at the forefront of the world's technologies, witnessing firsthand their impact on our customers.
A Day In Your Life:
Own the algorithm lifecycle from problem definition and data analysis to prototyping and delivering production-ready models.
Combine classic methods with inference techniques: statistics, Time series, Deep learning, anomaly detection, Recommendation Systems, Transformers, and Inference to extract data-driven insights.
Research, design, and build Agentic applications on top of sensor time-series data, textual data, images, ML applications, and other various data sources.
Engage with customers and collaborate with our product team to develop innovative solutions utilizing new types of data.
Leverage modern technologies: work with cloud-based big data platforms for storage, distributed processing, LLMs and agents (GPT, Claude, Gemini), defining & building Gurdrails, reasoning chain as function call, planning, ML-based vectorization and embeddings, and stream analysis.

You will join the Deployment Platform team, which puts technology directly in the hands of customers, field technicians, and partners. As an AI-Native mobile engineer, your primary development framework is Flutter (with native iOS and Android used when needed), building the mobile application central to field deployment. You are also comfortable across the full stack to ensure end-to-end feature delivery. Most importantly, you will shape the next generation of agentic installation experiences that define how industrial AI reaches the factory floor. This is a high-impact role at the intersection of mobile, IoT, and AI.
A Day In Your Life:
Design, build, and maintain high-quality, cross-platform mobile applications for iOS and Android using the core Flutter/Dart stack.
Lead the design and shipment of agentic-first workflows for guided installation, leveraging LLMs (Azure OpenAI, Gemini) to assist technicians and automate decision-making in the field.
Implement complex IoT/Hardware integration features, including NFC provisioning, AR field tools, and indoor positioning/navigation.
Contribute to backend and frontend services/APIs to ensure seamless, end-to-end feature delivery.
Architect and maintain a scalable, modular monorepo, ensuring robustness through strong state management (BLoC/RxDart) and comprehensive test coverage.
Collaborate with product and design teams to deliver exceptional UI/UX, including adaptive and RTL-aware layouts.