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As a Quality and Reliability (Q&R) Engineer, you will lead the qualification and long-term reliability of advanced System-on-Chip (SoC) and RF semiconductor products for automotive applications. Youll work across digital and RF domains to ensure robust performance and compliance with industry standards.
What will your job look like:
Define and manage Quality and Reliability specifications, simulations, and qualification plans for SoC and RF die and package.
Plan and execute automotive-grade qualifications per standards such as AEC-Q100, JEDEC JESD22, and IATF 16949.
Design and implement die-level and package-level stress tests.
Select and prepare electrical, environmental, and mechanical test platforms for reliability testing.
Define requirements for Pre-Si Q&R (e.g. ESD, LU, EM, IR drop), Design-for-Test (DFT), electrical characterization, and Post-Si Q&R testing of digital, mixed-signal and RF SoCs.
Collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (OSATs).
Lead failure analysis, reliability modeling, and corrective action processes (e.g., 8D, FMEA, FMEDA).
Document and certify automotive standards compliance, including PPAP/APQP deliverables.

We are looking for a FPGA Design Engineer.
What you will be doing:
Design and implement digital logic using VHDL for FPGAs (Xilinx, Altera).
Define and develop FPGA architectures based on system requirements.
Simulate and verify functionality at module and system levels.
Integrate IP cores and develop custom modules for data acquisition(ADC,DAC) ,communication protocols and control logic.
Collaborate with hardware, software, and verification teams to ensure robust integration.
Conduct hardware bring-up and debug using oscilloscopes, logic analyzers, and on-chip tools (ILA, SignalTap).
Document design specifications, test plans, and verification reports

We are looking for a highly motivated and professional senior physicist to lead and perform research and development at the interface of physics and medicine, in the rapidly developing field of TTFields.
Our physics group is leading an effort to develop a new field of research: Tumor Treating Fields (TTFields) dosimetry and treatment planning, and currently specializes in numerical simulations, biophysics research, experimental research, advanced algorithms, and numerical/clinical data analysis.
This is a full-time position, located at our R&D center, Haifa, Israel
ESSENTIAL DUTIES AND RESPONSIBILITIES:
Conduct research into the distribution of TTFields within the body using both electromagnetic and heat transfer simulations
Develop algorithms and infrastructure to support simulations and analysis of simulation results and clinical data.
Participate and support team efforts to develop the next generations of devices and treatment planning platforms for TTFields therapy.
Participate in research and development collaborations with internal groups of engineers and scientists, and with external researchers from academia.
Present results at internal meetings, seminars, and external scientific conferences; contribute to writing scientific papers and patent applications.

We are seeking a highly motivated, energetic, Software Engineer to support our Silicon Photonics Engineering group in Haifa, Israel.
Development occurs in a dynamic and challenging global multi-site environment. However, this is an individual contributor position reporting to the SiPh Engineering Manager in North Reading.
The ideal candidate will play a pivotal role in our dynamic team and will participate in developing complex test solutions for the emerging silicon photonic market at all stages of fabrication, from wafer probe to packaged test. This is a fantastic opportunity to contribute to innovative projects in the field of instrumentation
Utilize extensive C# experience to design, develop, and implement high-quality software instrumentation solutions
Collaborate with cross-functional teams to analyze requirements and deliver robust software applications
Develop scalable, high-performance, high-quality, extensible and maintainable software
Python knowledge is a plus, contributing to the versatility and adaptability of the development team

we are looking for a SoC / IP Architect to shape the next revolution in electronics!
Responsibilities

Define and design architecture: Create the overall SoC/IP architecture based on product and customer requirements and define detailed technical specifications.
Collaborate with cross-functional teams: Work with a variety of teams, including logic design, verification, firmware architecture and development teams, and physical design, to ensure successful execution.
Lead technical discussions and architectural reviews, guiding design and verification teams to deliver scalable, high-quality implementations.
System-level integration: Ensure seamless hardware-software co-design by working on aspects like control paths, interrupt schemes, and debug infrastructure.
Drive architectural decisions that optimize scalability, and future readiness for next-generation applications.
Act as Functional Safety manager, leading the definition, execution and oversight of functional safety strategy and processesensuring compliance with standards (such as ISO 26262), driving hazard and risk analyses, coordinating cross-functional teams, and embedding safety-culture across product development

We are currently looking for a Performance Simulation Expert develop and evaluate next generation performance features as well as develop the future generation of our Compute system simulation infrastructure, models and analysis tools.
Responsibilities:
Develop and analyze performance and power features in our cycle accurate pre-silicon model and improve the accuracy of the current Server system simulator
Design the architecture of the new generation system simulation platform that will be used to analyze performance of Server (Compute and AI) workloads and identify performance bottlenecks
Develop new technologies, methodologies and tools for simulation. Analysis and debug of applications and workload on Huawei servers
Propose and simulate optimizations and innovations on the HW and SW in order to improve server performance for given workloads
Distribute the simulation platform, train and support other teams in China and in Europe using the simulation platform, technology and methodology

We are looking for an experienced and creative AI processor VLSI Architect to architect and model the core of our next generation processors.

We are looking for a Senior CPU Core Architect.
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

We are looking for a CPU Core Architect representative.
The CPU core Architect representative will be a member of the processor core architecture team.
He will be responsible of the technical communication between the team in Israel and the team in China. He will be presenting and explaining Microarchitecture features developed by architects in Israel, collecting requirements, answering question.
He will be responsible to hold deign reviews with the team in China.
He will also be proposing new Micro architecture features based on his own ideas. take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture.
This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.
The CPU core architect representative would be relocating to China for an extended period after getting familiar with the team in Israel.

We are looking for a CPU Core Architect.
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our companyusers worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our company's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our company AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users , Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Design and optimize power distribution networks (PDN) across chip, package, and board levels. This includes managing power/ground planes, decoupling capacitors, and power gating strategies.
Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and electromagnetic interference (EMI).
Implement and verify low-power design methodologies, such as multi-voltage designs and clock gating, using power intent formats like UPF/CPF.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.