דרושים » חשמל ואלקטרוניקה » Senior PHY System Integration Engineer

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target impedance requirements and validate compliance across all power rails.
Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing.
Work closely with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces.
Develop power integrity design guidelines and best practices for next-generation networking products.
Support schematic reviews, layout reviews, and design sign-off activities.
Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment.
Investigate and resolve PI-related issues during board bring-up, validation, and production.
Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance.
Drive continuous improvement of PI methodologies, simulation flows, and validation processes.

We are looking for a creative and motivated Software Engineer to join our SONiC open source NOS team. Our team is responsible for the design and integration of SONiC across our Networking products. In this role, youll have the opportunity to work on next-generation, high-speed networking solutions for AI data centers, contribute to open-source projects, and collaborate with experts across us and the broader SONiC community.

Youll help lead the development of new SONiC networking features and chassis management capabilities across our Networking products. Were looking for someone who enjoys solving complex technical challenges, learning quickly, and collaborating in a dynamic and diverse team environment.

What youll be doing:

Design, integrate, and deliver new features as part of the SONiC release train across our Networking products.

Develop networking and chassis management capabilities for next-generation platforms.

Work in a Continuous Deployment environment with fast development and deployment cycles.

Collaborate with experienced teams across our Networking and with members of the broader SONiC open-source community.

Develop high-quality, production-ready code that is published and reviewed in leading open-source environments.

Take ownership of features from design and implementation through integration and delivery.

We are looking for an Engineering Manager to join our Network System Validation group. You will work on system validating advanced networking solutions across our complex AI cluster environments. The group is a high-performance engineering force that treats validation as a first-class software problem. We build systems, frameworks, and benchmarks that prove our network's correctness and performance at scale. In this role you will lead the validation direction and engineering excellence of one of our technology validation teams. This is a management role for a technology leader who can own the technical roadmap and execution, mentoring a team of high-performance engineers, and push our network to its speed-of-light limits. This role combines the development of methodologies and automation tools with system validation, performance analysis, and investigation of cutting-edge AI networking technologies at scale.

What youll be doing:

Lead, mentor, and coach a team of software development and system validation engineers.

Review system and product requirements, design validation methodologies, develop comprehensive test plans, functional and performance, for networking technologies in large-scale AI cluster solutions.

Develop and maintain benchmarks, automation tools and scripts for test execution, environment setup, log collection, and data analysis.

Lead end-to-end investigation of complex issues by reproducing real-world scenarios, analyzing logs, telemetry, packet captures, and system metrics to identify functional issues and performance bottlenecks, triaging problems across the hardware and software stack, and driving them to root cause and resolution.

Collaborate deeply with software and hardware development teams to debug networking technologies, including NCCL, RoCE, RDMA, and related software components using targeted experiments and code inspection.

Profile and research AI training and inference workloads, correlating application behavior with network and system telemetry to identify scalability and performance limitations.

Document findings, communicate technical results, and continuously improve validation methodologies, automation environments, and engineering processes.

Foster a team culture centered on software quality, accountability, and technical excellence.

We are seeking outstanding Electrical Engineering graduates from top universities to join our Electrical Compliance team and gain hands-on experience with cutting-edge networking technologies and best-in-class ASIC interfaces.
Responsibilities
Operate and maintain test equipment for compliance and validation processes.
Perform switch platform testing to ensure reliability and performance.
Work with advanced ASIC interfaces, including Ethernet, PCIe, USB, SPI, UART, I2C
Assist in troubleshooting and analysing electrical compliance issues.
Collaborate with senior engineers to improve testing methodologies.
Career Growth Opportunities
Gain real-world experience in compliance testing and hardware validation.
Learn from industry-leading engineers and expand your technical expertise.
Build skills in automation, data analysis, and advanced networking technologies that are highly valued in the industry.
What We Offer
Exposure to state-of-the-art networking technologies.
Opportunity to work on real-world compliance challenges.
Mentorship from industry experts.
Learn from the best and build the future of networking
Ready to launch your career? Apply now and start building the future with our company.
Please attach your gradesheet.

We are looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW development, architecture, chip design teams and gain deep understanding of NVIDIA's Networking products and technologies.

We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!

What youll be doing:

Enabling new SerDes and Optical Technologies

Implement FW functionality in signal processing units of NVIDIA products

Work closely with the architecture, HW, and SW design teams

Define implement and maintain FW algorithm to control the Silicon

Develop and test FW on emulation & simulation environments during the Pre-silicon phase

Debug and screen HW/FW/SW issues

Take an active part in silicon bring-up and SW development phases

Lead data-driven discussions about the product functionality and areas for improvement

We are We are seeking a Senior Switch Silicon Security Architect to define end-to-end security across switch silicon, firmware, networking protocols, and management stacks. Working with architecture, engineering, and product teams, this role will shape security from early design through validation, manufacturing, and deployment.

What you'll be doing:

Research, design, and drive the implementation of hardware and software security architectures for switch platforms that meet internal requirements, customer needs, and industry standards.

Develop threat models and define end-to-end security architectures for hyperscale networking solutions spanning silicon, firmware, high-performance networking protocols, and management stacks.

Partner across us with hardware, software, research, and product teams to shape the strategic direction of switch silicon and fabric-level security.

Define and drive multi-generation security roadmaps for switch silicon, networking protocols, and fabric-level solutions.

Engage directly with customers to understand their security requirements and translate them into switch silicon and system architectures that address both component and solution-level needs.

Represent us in industry standards bodies and collaborate with external partners to shape emerging security standards and drive interoperability across silicon and networking ecosystems.

We are looking for an experienced Senior Signal Integrity Engineer to join our Hardware Engineering team. This role focuses on ensuring optimal signal integrity for high-speed interfaces, including Ethernet, PCIe, DDR5, and other next-generation technologies. As part of the team, you will be responsible for performing signal integrity analysis, developing signal integrity models, and ensuring electrical compliance for high-speed SERDES I/Os.
Responsibilities:
Conduct signal integrity analysis and simulations for high-speed interfaces such as 112Gbps Ethernet, PCIe Gen5, and DDR5 interfaces.
Develop and implement signal integrity guidelines for PCB design, ensuring high-performance and low-loss signal paths.
Analyze and resolve signal integrity issues related to high-speed interfaces, including reflection, crosstalk, and power delivery network (PDN) issues.
Collaborate with PCB layout engineers to optimize design for signal integrity, ensuring compliance with electrical standards and high-speed design best practices.
Perform time-domain and frequency-domain analysis, including loss, jitter, and eye-diagram analysis.
Utilize EDA tools such as Ansys SIWAVE, HFSS, or similar for simulation and validation of signal integrity designs.
Work closely with cross-functional teams to integrate signal integrity considerations into the overall hardware design process.
Develop behavioural models based on measured signal integrity data to inform future design and simulation work.
Conduct pre- and post-layout simulations and measurements for high-speed signal interfaces.

We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

We are seeking a Communication PHY Algorithms Engineer.
This role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.

We are seeking a highly skilled and experienced multidisciplinary engineer with a strong background in system design to join our team. In this role, you will contribute to our upcoming projects and play a key part in the rapid expansion of the Ethernet market.
As a such, you will be responsible for developing high-speed digital and analog circuit boards used in Ethernet products. Your duties will include designing board schematics, overseeing PCB layout, and conducting lab . Additionally, you will be responsible for evaluating new hardware solutions, providing technical leadership in troubleshooting and reviewing schematics, layouts, and design for manufacturability (DFM), as well as managing components selection.