דרושים » הנדסה » Senior VLSI Engineer

We are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (Hybrid model)
Responsibilities:
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

Our Interconnect Networking Product Engineering team is looking for an excellent hardware engineer with strong coding, analysis, and debugging skills. This role requires a deep understanding of both hardware and software to develop robust test capabilities and processes. You will drive efficient integration and provide engineering support for production testing of cutting-edge product technology. You will help ensure reliable, efficient production tests with high coverage and strong outgoing product quality.

What youll be doing:

Characterize and develop test processes of advanced interconnect products.

Play a key role in the development and bring-up of advanced hardware test solutions supporting next-generation interconnect products.

Develop embedded software capabilities packages to support various of advanced power components and Digital\ Analog ICs

Cooperate with multidisciplinary design and analysis teams for bring up, performance optimization and seamless production integration.

Lead test solution innovations to reduce test time, costs and improve overall product quality.

Develop software solutions to find, debug, and resolve problems in the production and bring-up processes.

Collaborate with overseas manufacturing and mass-production teams to improve yield, test coverage, and capacity, and to resolve production issues.

Lead advanced studies of product behavior under a wide range of system and environmental conditions.

Silicon One is seeking a CAD Engineer to join the Silicon One Physical Design team.
Meet the Team:
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
As part of our team, youll contribute to the development of our next-generation network devices-Silicon One. Our team operates in a startup-like environment within a stable and leading corporation.
Our design center is uniquely equipped, hosting all silicon hardware and software development fields under one roof.
We are revolutionizing the industry by building a new internet for the 5G era, providing a unified, programmable silicon architecture that serves as the foundation for all of our future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, catering to both fixed and modular platforms. They deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility.
Silicon One is a ground-breaking, groundbreaking technology that will serve our customers and end users for decades to come. The Internet now has a new, faster, better, and safer engine!
Your Impact:
You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.
You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

The Senior Hardware Test Engineer is responsible for developing, implementing, and sustaining test processes and equipment used in the manufacturing of hardware products. This role ensures that products meet quality, reliability, and performance standards through robust test strategies, automation, and continuous improvement. The engineer acts as a bridge between design engineering, manufacturing operations, and quality assurance, supporting new product introductions (NPI) through to mass production and sustaining phases.
This is a great opportunity to be part of one of the fastest-growing AI infrastructure companies in history, an organization that is in the center of the hurricane being created by the revolution in artificial intelligence.
we are the data platform company for the AI era. We are building the enterprise software infrastructure to capture, catalog, refine, enrich, and protect massive datasets and make them available for real-time data analysis and AI training and inference. Designed from the ground up to make AI simple to deploy and manage, our company takes the cost and complexity out of deploying enterprise and AI infrastructure across data center, edge, and cloud.
Our success has been built through intense innovation, a customer-first mentality and a team of fearless workers who leverage their skills & experiences to make real market impact. This is an opportunity to be a key contributor at a pivotal time in our companys growth and at a pivotal point in computing history.
Role and Responsibilities:
Test Development & Validation
Design, develop, and implement test plans, test fixtures and infrastructure.
Collaborate with R&D to define test requirements early in the product lifecycle.
Develop test scripts and automation software (Python, LabVIEW, C#, etc.) to improve coverage and efficiency.
Validate test coverage, yield, and reliability through statistical analysis (GR&R, Cpk, SPC).
New Product Introduction (NPI)
Support EVT, DVT, and PVT phases with test readiness and execution.
Lead test process transfer to contract manufacturers (CMs) or ODM partners.
Train CM engineers/technicians on test systems and procedures.
Ensure compliance with safety, regulatory, and customer requirements.
Manufacturing Support & Continuous Improvement
Monitor production test yields, debug failures, and drive root cause analysis (RCA).
Implement corrective actions and continuous improvements to reduce test time, cost, and false failures.
Maintain and calibrate test equipment and fixtures.
Support ECO (Engineering Change Orders) by updating test plans and equipment accordingly.
Cross-Functional Collaboration
Work closely with hardware, firmware, and reliability engineers to improve product testability and robustness.
Partner with Quality and Operations to ensure smooth scaling into mass production.
Engage with suppliers and CM partners on test strategy alignment.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.



Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!



What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

Youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Join our team as a Senior Power and Performance Architect - Networking, influencing the future of our network systems.

What you'll be doing:
Develop, model, and validate groundbreaking power and performance optimization techniques for network fabrics, components (NICs, Switches), and systems. Collaborate closely with cross-functional teams including silicon design, system architects, software/firmware engineers, performance analysts, thermal engineers, and AI researchers to ensure end-to-end power and performance optimization. You will determine strategies that successfully implement flawless performance and power efficiency in our ambitious projects!

We are seeking a Networking Software Engineer to join our RDMA Transport Software team, driving the development of next-generation RDMA solutions for AI, cloud, HPC, and storage. You will research and develop innovative transport algorithms that push the limits of performance and scalability. You will work in a fast-paced, collaborative environment alongside talented engineers from around the world, supporting the data needs of the worlds largest enterprises

What you'll be doing:
Take part in research, design, and development of advanced RDMA transport mechanisms and algorithms, enhancing performance, reliability, and scalability.
Collaborate closely with hardware engineers, software developers, and system architects to align on project objectives and requirements.
Keep up with industry trends and emerging technologies, integrating new ideas and innovations into the development process

Join our powerful Networking Silicon engineering team as a Synthesis Senior CAD Engineer! In this pivotal role, you'll be at the forefront of developing the industrys advanced high-speed communication devices, delivering outstanding efficiency and minimal latency. This is your chance to architect, build, and improve advanced RTL to PNR tools, flows and methodologies using the worlds latest process technologies. Be part of a group thats driving technology forward and pushing the frontiers of development.

What you will be doing:

Methodology Deployment: Design and refine sophisticated Synthesis flows to meet ambitious Power, Performance, and Area (PPA) objectives.

Partner closely with upstream Front-End Design and downstream Place & Route (P&R) flows development teams. Define boundaries, resolve design constraints, and bridge systemic execution gaps.

Develop robust and scalable scripts using Tcl/Python to improve Flow Turnaround Time (TAT). Integrate next-generation capabilities such as AI/ML automation into production runs.

Serve as a subject matter expert and trusted representative for adjacent project teams. Provide proactive support, deep-dive debugging of complex tool failures, and formal synthesis training to build teams.

We are rebuilding the way chips get built, and were looking for a senior engineer to help lead that transformation.

This is a full-stack platform role on the team responsible for the development environment behind our silicon. You will help define how agentic orchestration and durable execution become first-class parts of the chip-design workflow.

Were looking for someone who has built complex systems before - across backend, frontend, and infrastructure - and is ready to set the technical direction for what comes next.

What You'll be doing:

Architect and lead full-stack EDA platforms end to end, from data models and backend services to the frontends engineers use every day - while making key technical and build-vs-buy decisions.

Own the infrastructure these platforms run on at scale, including CI/CD, containerization, observability, on-prem compute, and cloud-native Kubernetes environments.

Set engineering standards across the team by leading design reviews, improving reliability and developer experience, and mentoring engineers.

Act as a technical leader across silicon, backend, and design-automation teams, helping turn fragile manual flows into dependable automated systems used by many engineers.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

You will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.