דרושים » חשמל ואלקטרוניקה » Senior Power and Performance Architect

We're looking for a Senior Data Scientist to join the AI cybersecurity team in the Security and Networking Architecture group. As a Senior Data Scientist youll have the opportunity to take an active part in the research and development of our world-class networking and data center security products. This role involves creative problem solving alongside engineering teams, and is key for the continued success of AI networking security.

What youll be doing:

Developing agentic AI systems for security, combining generative models, RAG, and tool-augmented reasoning to automate threat analysis and response workflows.

Optimizing and fine-tuning models for performance, scalability, and resource utilization, considering factors such as latency, efficiency, and cost.

Developing, implementing and improving models and algorithms across media types, whether time series, images, text, audio or video.

Leveraging data pipelines to efficiently process and transform large volumes of data for training and inference purposes.

Applying alignment techniques and parameter efficient fine-tuning to improve model performance.

Measuring and benchmarking model and application performance to drive improvements.

Driving the gathering, building, and annotation of domain specific datasets for benchmarking and training.

Collaborating closely with software and hardware engineers on new features and improvements. Participate in developing and reviewing code, design documents, use case reviews, and test plan reviews.

We're looking for a Senior AI Infrastructure Engineer to join a group that specializes in Security and Networking, and specifically ML/AI, MLOps, and agentic AI development. As a Senior AI Infrastructure Engineer, youll build and maintain the infrastructure, tools and processes necessary to support the AI lifecycle in a production environment. You will collaborate closely with data scientists, software engineers, and security architects to ensure smooth development, deployment, evaluation, and optimization of AI pipelines, models, and agents. This role requires a balance of high-level engineering rigor and a collaborative spirit; youll be a technical anchor and a supportive peer for teams across the organization.



What youll be doing:

Architecting, developing and optimizing scalable infrastructure for deploying security and networking AI models and agents in production.

Managing ML/agentic workflows to ensure performance, high availability, resource efficiency, and cost-effectiveness.

Designing and implementing pipelines and frameworks for AI training, inference, and experimentation.

Partnering with data scientists and security architects to operationalize AI agents, including packaging and integration with existing systems. This includes contributing to and reviewing code, design documents, and test plans.

Partnering with DevOps teams to integrate pipelines and workflows into CI/CD processes, ensuring reliable deployments and rollbacks.

Building proactive monitoring systems to identify issues in quality and infrastructure before they impact production.

Implementing access controls, authentication mechanisms, and encryption standards to keep our AI models and data secure.

Documenting guidelines and leading knowledge-sharing sessions to elevate the teams collective development expertise.

We are seeking a technical leader to define, craft, implement, and guide firmware architecture for reliability, availability, serviceability, and power management across next-generation Networking products and platforms. You will take a strong hands-on role, working with hardware, firmware, software, validation, customer engineering, and external partners to build robust, diagnosable, power-efficient systems for large-scale deployments.

What you'll be doing:

Define platform-level firmware architecture for RAS and power management across SoCs, accelerators, DPUs, servers, embedded systems, and data center platforms.

Own error detection, classification, containment, recovery, escalation, and reporting architecture.

Define firmware architecture for power sequencing, power states, reset flows, thermal and power fault handling, idle management, and recovery from power-related failures.

Create firmware specifications for hardware error handling, health monitoring, crash capture, telemetry, diagnostics, debug data, and field serviceability.

Define interfaces and contracts between firmware, hardware, operating systems, BMCs, management controllers, platform software, and cloud/service infrastructure.

Drive architecture reviews, tradeoff discussions, failure-mode analysis, validation strategy, and long-term RAS and power management roadmap planning.

Establish standards for error logs, event schemas, telemetry flows, recovery policies, service diagnostics, and production debug infrastructure.

Guide engineering teams through implementation, validation, silicon bring-up, platform integration, and production deployment of RAS and power management features.

Analyze customer and field failures, identify architectural gaps, and feed lessons learned into future platform designs.

We are seeking an experienced and highly motivated Firmware Engineer to join our NIC/Switch Firmware Development Team in Tel Aviv.
The successful candidate will design and develop innovative firmware features to unleash the full potential of our ConnectX/Switch architecture.
Our Firmware Team develops cutting-edge networking features for cloud, HPC, and storage.
This position requires a broad background in NIC or Switch architecture, along with a proven ability to develop robust and efficient solutions to complex design challenges.
The Firmware Team drives the data growth of the worlds largest companies. With talented engineers around the globe, our work environment is dynamic and meaningful.
What You Will Be Doing:
Deepen Your Expertise: Gain a thorough understanding of system debugging, networking technology and stacks, as well as the HW/FW/SW relationships.
Innovate Firmware Features: Design and implement new firmware features in our NIC/Switch Firmware core (e.g., our ConnectX/Spectrum products).
Optimize Performance: Characterize and refine key firmware design elements and code to maximize performance and ensure robustness and flexibility.
Learn Complex Project Management: Understand how a large, complex software project is operated, maintained, qualified, and released, and learn how hardware and firmware are developed.

We are looking for an excellent SW Engineer to join the InfiniBand Switch and NVLink Core FW group in Tel-Aviv / Raanana. As the team member, you will be part of a major development effort for the next-generation networking products. The verification team develops cutting-edge networking features for cloud, HPC and storage. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced. Are you ready for the challenge?
What you will be doing:
As a SW Engineer, you will part of a group of firmware verification engineers, using your expertise in C++ and Python in an Agile methodology.
Develop the verification process, aligning with quality standards and project timelines.
Design and implement new features in the core of Switch and GPUs
Drive and facilitate the planning, scheduling, and execution of the project and activities of the team
Collaborate with architecture and different software design teams as part of the software development lifecycle.
Work in pre and post-silicon development environments of next-generation networking products.
Gain a deep understanding of networking technology, system debugging and stacks, as well as the HW/FW/SW relationship.
Innovate! Bring our FW switching products to shine in customers view.

The MLIL FLOW team is looking for a Senior Software Development Engineer to lead the design and delivery of systems software for our next-generation ML accelerator servers. We build production software to validate, initialize, monitor, and qualify these servers - from first silicon through fleet-scale deployment. We work on the physical systems that execute ML workloads: Server bring-up, hardware diagnostics, interconnect validation, power/thermal monitoring, and fleet-scale operations are our bread and butter.


Key job responsibilities
Lead the architecture and implementation of hardware validation and diagnostic software for new ML acceleration platforms.
Drive technical direction for PCIe validation, power/thermal diagnostics, and stress-testing frameworks that run across manufacturing, vetting, and production environments.
Own subsystems end-to-end: from design through implementation, testing, deployment, and operational excellence at fleet scale.
Work with Hardware, Manufacturing, EC2 teams to create coordinated software packages that enable both qualification and rapid deployment.
Debug and root-cause complex hardware/software interaction failures on first silicon and production fleet returns; drive root-cause to closure.
Build and maintain data pipelines, dashboards, and monitoring systems for fleet health and performance benchmarking.
Mentor engineers, define best practices, drive design reviews, and raise the bar for the team.
Lead multiple development initiatives in parallel, balancing schedule, risk, and technical quality across a fast-moving hardware program.

We are seeking a dedicated Firmware Engineer to join our NIC Firmware Core team in Beer-Sheva/Tel-Aviv. You will contribute to the development of brand-new networking adapter technologies, elevating the performance of current and future devices. We develop innovative and next-generation networking devices that are known for their outstanding performance and power efficiency. The position involves all aspects of firmware development, including design, micro-architecture, software interfaces, and verification. We are seeking a dedicated and motivated engineer who will contribute to the development of advanced technology Network Adapters. You will also have the opportunity to create features for leading cloud computing providers and high-performance computing networks.
What youll be doing:
Take a part in the design, development, test, debug, and optimization of low-level firmware layer on next-generation network adapters up to package release
Analyze, integrate, support, and debug low-level firmware layer on verification environments
Collaborate with firmware, software, and architecture teams to analyze, design, and debug legacy and new low-level firmware flow
Improve our team processes including design and implementation of new methodologies, automated processes.

The Senior Hardware Test Engineer is responsible for developing, implementing, and sustaining test processes and equipment used in the manufacturing of hardware products. This role ensures that products meet quality, reliability, and performance standards through robust test strategies, automation, and continuous improvement. The engineer acts as a bridge between design engineering, manufacturing operations, and quality assurance, supporting new product introductions (NPI) through to mass production and sustaining phases.
This is a great opportunity to be part of one of the fastest-growing AI infrastructure companies in history, an organization that is in the center of the hurricane being created by the revolution in artificial intelligence.
we are the data platform company for the AI era. We are building the enterprise software infrastructure to capture, catalog, refine, enrich, and protect massive datasets and make them available for real-time data analysis and AI training and inference. Designed from the ground up to make AI simple to deploy and manage, our company takes the cost and complexity out of deploying enterprise and AI infrastructure across data center, edge, and cloud.
Our success has been built through intense innovation, a customer-first mentality and a team of fearless workers who leverage their skills & experiences to make real market impact. This is an opportunity to be a key contributor at a pivotal time in our companys growth and at a pivotal point in computing history.
Role and Responsibilities:
Test Development & Validation
Design, develop, and implement test plans, test fixtures and infrastructure.
Collaborate with R&D to define test requirements early in the product lifecycle.
Develop test scripts and automation software (Python, LabVIEW, C#, etc.) to improve coverage and efficiency.
Validate test coverage, yield, and reliability through statistical analysis (GR&R, Cpk, SPC).
New Product Introduction (NPI)
Support EVT, DVT, and PVT phases with test readiness and execution.
Lead test process transfer to contract manufacturers (CMs) or ODM partners.
Train CM engineers/technicians on test systems and procedures.
Ensure compliance with safety, regulatory, and customer requirements.
Manufacturing Support & Continuous Improvement
Monitor production test yields, debug failures, and drive root cause analysis (RCA).
Implement corrective actions and continuous improvements to reduce test time, cost, and false failures.
Maintain and calibrate test equipment and fixtures.
Support ECO (Engineering Change Orders) by updating test plans and equipment accordingly.
Cross-Functional Collaboration
Work closely with hardware, firmware, and reliability engineers to improve product testability and robustness.
Partner with Quality and Operations to ensure smooth scaling into mass production.
Engage with suppliers and CM partners on test strategy alignment.

We are looking for a dedicated SoC Clocks Design Automation Engineer to join our Networking Silicon team. In this role, youll focus on developing and supporting clock-related design flows and methodologies for SoC and networking chips, ensuring efficient and high-quality design implementation. Youll also chip in to SoC top-level automation and integration activities, building on existing flow infrastructure to improve efficiency and consistency across projects. Introduction
What you'll be doing:
Develop and maintain design automation and methodologies for SoC and networking clock flows.
Collaborate with design, STA, and project teams to ensure timely and high-quality design closure.
Develop and improve SoC top-level automation scripts and flows built upon existing infrastructure and tools.
Support SoC integration and construction flow activities across multiple projects.
Assist in timing, power, and noise analysis to ensure efficient performance.

Required Senior Chip Design Verification Engineer
job requisition id
We have been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technology-and amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an employee, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
Join us and become a pivotal part of our Networking Silicon engineering team in Tel Aviv, Israel. We are renowned for developing the industry's top high-speed communication devices, known for their outstanding efficiency and minimal latency. This role offers an outstanding opportunity to be involved in groundbreaking projects, collaborating with versatile experts to foster innovation and excellence. As a Senior Chip Design Verification Engineer, you will be immersed in a dynamic and encouraging environment where your efforts will have a meaningful impact.
What you'll be doing:
Play a crucial role in developing our next-generation chip controller.
Engage in building and verification tasks within a challenging, multi-disciplinary context.
Collaborate closely with cross-functional teams to advance our networking and GPU networking chips and systems.
Drive the implementation of sophisticated verification environments to ensure flawless functionality.
Mentor and guide junior engineers, encouraging a collaborative and inclusive team atmosphere.