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לפני 6 שעות
חברה חסויה
Location: Yokne`am and Tel Aviv-Yafo
Job Type: Full Time
Join our powerful Networking Silicon engineering team as a Synthesis Senior CAD Engineer! In this pivotal role, you'll be at the forefront of developing the industrys advanced high-speed communication devices, delivering outstanding efficiency and minimal latency. This is your chance to architect, build, and improve advanced RTL to PNR tools, flows and methodologies using the worlds latest process technologies. Be part of a group thats driving technology forward and pushing the frontiers of development.

What you will be doing:

Methodology Deployment: Design and refine sophisticated Synthesis flows to meet ambitious Power, Performance, and Area (PPA) objectives.

Partner closely with upstream Front-End Design and downstream Place & Route (P&R) flows development teams. Define boundaries, resolve design constraints, and bridge systemic execution gaps.

Develop robust and scalable scripts using Tcl/Python to improve Flow Turnaround Time (TAT). Integrate next-generation capabilities such as AI/ML automation into production runs.

Serve as a subject matter expert and trusted representative for adjacent project teams. Provide proactive support, deep-dive debugging of complex tool failures, and formal synthesis training to build teams.
Requirements:
What we need to see:

Academic Background: B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or a related technical field, or equivalent practical experience.

Core Synthesis Experience: 3+ years of hands-on experience in VLSI synthesis flows, with deep, proven expertise in Synopsys Fusion Compiler or Design Compiler (DC-Top/DC-Ultra).

Technical Skills: Strong proficiency in Tcl or Python scripting within a production-level CAD/EDA environment.

Attitude & Ownership: A highly enthusiastic, dedicated approach with a demonstrated "sense of ownership" to proactively step into process vacuums and drive complex tasks to completion.


Ways to stand out from the crowd:

Familiarity with synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Genus/ Innovus/Tempus).

Experience in methodology definition / flow ownership of synthesis / Place and Route/ STA steps is an advantage.

Great teammate with strong ownership, self-learning skills, and the ability to work autonomously.
This position is open to all candidates.
 
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לפני 2 שעות
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing full-chip physical design methodologies, Physical Verification development and support through all the projects, Tapeout activities for implementation of networking chips and SOCs.

Work closely with Full Chip Layout owners and block owners, project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art FCL physical design problems that are needed for our chips.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

Participating and developing flow and tool methodologies for fullchip, physical design verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

You should have at least 5+ years of hands-on Full-chip layout and Physical Verification experience, demonstrating your proven expertise.

A strong background in Physical Verification methodology, including DRC / LVS / ANT / ERC / DFM in advanced process nodes is necessary.

Proficiency using Python, Tcl, Shell, Make scripting.

Experience in Linux environments.

AI tools orientation or alternatively a desire to learn.

Familiarity with physical build EDA tools, including Synopsys (ICC2/FC) and Cadence (Innovus).

Familiarity with Physical Verification tools: Synopsys (ICV), Siemens (Calibre)

Self-motivation, attention to detail, and good interpersonal skills.


Ways to stand out from the crowd:

Experience with data collection and analysis

Experience in methodology definition / flow owner of Full-chip / Place and Route

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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לפני 9 שעות
חברה חסויה
Location: Yokne`am
Job Type: Full Time
We are looking for a driven and enthusiastic Senior VLSI Engineer to join our outstanding Networking Silicon engineering team! You will be joining our rapidly growing Interposer team-a highly specialized and deeply impactful domain shaping the future of advanced silicon packaging.

If you have a strong background in the physical aspects of VLSI but haven't worked with interposer technology before, this is a unique opportunity to pivot and learn a cutting-edge domain. You will join a highly experienced group of industry-leading experts, working on the most advanced technology nodes in the world. Come take part in designing our groundbreaking chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a massive impact.

What You Will Be Doing:

Mastering New Technologies: Learning the intricacies of advanced Interposer technology, working shoulder-to-shoulder with highly experienced domain experts.

Meticulous Execution & Ownership: Taking a high level of ownership over interposer projects. You will act as the technical anchor, driving timelines, managing complex workflows, and ensuring highly accurate, detail-oriented execution.

Driving Physical Implementation: Overseeing the physical design and integration aspects of complex VLSI designs.

Cross-Functional Collaboration: Taking part in project definitions towards POR, working in close interaction with other domains such as Architecture, Front-End, Back End and Packaging

Problem Solving & Automation: Resolving complex technical challenges in groundbreaking technology nodes and taking an active part in flow and methodology development.
Requirements:
What We Need To See:

B.Sc. / M.Sc. or equivalent experience in Electrical Engineering/Computer Engineering.

5+ years of overall experience in VLSI development, with a strong orientation toward the physical aspects of design (Physical Design, Backend, Chip Integration, etc.).

Exceptional attention to detail and program management skills. You are highly organized, timeline-driven, and thrive on structure and accuracy.

Proactive and independent mindset. We are looking for a highly motivated self-starter who can take ownership of complex tasks and independently drive technical efforts forward.

A strong passion and proven ability to learn new, highly complex technical areas.

Familiarity with physical design methodologies, flows, and EDA tools.

A proactive, creative mindset and a fantastic teammate.


Ways to stand out from the crowd:

Scripting and coding skills are a strong plus.
This position is open to all candidates.
 
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לפני 6 שעות
Location: Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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לפני 3 שעות
חברה חסויה
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering.
You should have at least 5+ years of hands-on Physical Design 'Place and Route' experience, demonstrating your proven expertise.
A strong background in Physical Design methodology, including Synthesis, Floorplan, CTS and Routing, is necessary.
Sign-off stages experince such as , 'STA', 'PV', 'LEC' and 'EMIR'.
In-depth knowledge of advanced silicon process technologies.
Familiarity with physical build EDA tools, including Synopsys and Cadence.
A great teammate who thrives in a collaborative environment.
AI tools orientation or alternatively a desire to learn.

Ways to stand out from the crowd:
AI prompting experience.
Experience in Linux environments.
TCL, Python, shell scripting abilities.
Experience with data collection and analysis.
Understanding of the chip and die verification process.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Silicon One is seeking a CAD Engineer to join the Silicon One Physical Design team.
Meet the Team:
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
As part of our team, youll contribute to the development of our next-generation network devices-Silicon One. Our team operates in a startup-like environment within a stable and leading corporation.
Our design center is uniquely equipped, hosting all silicon hardware and software development fields under one roof.
We are revolutionizing the industry by building a new internet for the 5G era, providing a unified, programmable silicon architecture that serves as the foundation for all of our future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, catering to both fixed and modular platforms. They deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility.
Silicon One is a ground-breaking, groundbreaking technology that will serve our customers and end users for decades to come. The Internet now has a new, faster, better, and safer engine!
Your Impact:
You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.
You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Requirements:
Minimum Qualifications
A VLSI Design Engineer with extensive experience in backend design
B.Sc./M.Sc. in Electrical Engineering or Computer Engineering with relevent background.
5+ years of hands-on experience in a relevant domain
Strong understanding of Place & Route flow
Preferred Qualifications
Deep understanding of Physical construction and Integration.
Knowledge of Physical Design Verification methods like LVS/DRC and formal verification.
Experience with PD CAD and Physical Design EDA tools (e.g., Synopsys, Cadence).
Ability to support technology adoption and new tool integration.
Great teammate, self-learner, and able to work independently.
This position is open to all candidates.
 
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3 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.



Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!



What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.
Requirements:
What we need to see:

5+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools.

Strong programming skills in scripting languages.

BSc. in Electrical Engineering or Computer engineering.

Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility.



Ways to stand out from the crowd:

Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation.

Experience in Mentor TestKompress ATPG tool and retargeting flow.

Programming languages: TCL, PRL, Phyton & Unix shell scripts.

Experience with ATE and Silicon bring-up.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
The Senior Hardware Test Engineer is responsible for developing, implementing, and sustaining test processes and equipment used in the manufacturing of hardware products. This role ensures that products meet quality, reliability, and performance standards through robust test strategies, automation, and continuous improvement. The engineer acts as a bridge between design engineering, manufacturing operations, and quality assurance, supporting new product introductions (NPI) through to mass production and sustaining phases.
This is a great opportunity to be part of one of the fastest-growing AI infrastructure companies in history, an organization that is in the center of the hurricane being created by the revolution in artificial intelligence.
we are the data platform company for the AI era. We are building the enterprise software infrastructure to capture, catalog, refine, enrich, and protect massive datasets and make them available for real-time data analysis and AI training and inference. Designed from the ground up to make AI simple to deploy and manage, our company takes the cost and complexity out of deploying enterprise and AI infrastructure across data center, edge, and cloud.
Our success has been built through intense innovation, a customer-first mentality and a team of fearless workers who leverage their skills & experiences to make real market impact. This is an opportunity to be a key contributor at a pivotal time in our companys growth and at a pivotal point in computing history.
Role and Responsibilities:
Test Development & Validation
Design, develop, and implement test plans, test fixtures and infrastructure.
Collaborate with R&D to define test requirements early in the product lifecycle.
Develop test scripts and automation software (Python, LabVIEW, C#, etc.) to improve coverage and efficiency.
Validate test coverage, yield, and reliability through statistical analysis (GR&R, Cpk, SPC).
New Product Introduction (NPI)
Support EVT, DVT, and PVT phases with test readiness and execution.
Lead test process transfer to contract manufacturers (CMs) or ODM partners.
Train CM engineers/technicians on test systems and procedures.
Ensure compliance with safety, regulatory, and customer requirements.
Manufacturing Support & Continuous Improvement
Monitor production test yields, debug failures, and drive root cause analysis (RCA).
Implement corrective actions and continuous improvements to reduce test time, cost, and false failures.
Maintain and calibrate test equipment and fixtures.
Support ECO (Engineering Change Orders) by updating test plans and equipment accordingly.
Cross-Functional Collaboration
Work closely with hardware, firmware, and reliability engineers to improve product testability and robustness.
Partner with Quality and Operations to ensure smooth scaling into mass production.
Engage with suppliers and CM partners on test strategy alignment.
Requirements:
Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field.
5-8+ years of experience in manufacturing test engineering, preferably in electronics/hardware products.
Proficiency in test automation tools (e.g., LabVIEW, Python, C#, TestStand).
Familiarity with manufacturing processes
Strong problem-solving and analytical mindset.
Excellent communication and collaboration across cross-functional teams.
Ability to lead projects, mentor junior engineers, and work with global teams.
Desired Qualifications
Good understanding and experience of server systems including test methodology for CPU, memory and motherboards
Experience with IPMI and testing BMC functionality
Familiarity with networking and testing networking infrastructure
Experience with storage architecture, including testing SSDs
Experience with PCIe debugging and testing
Bench-top electrical debug tool experience as well as electrical design of test circuitry
Knowledge of programming devices such as CPLDs.
This position is open to all candidates.
 
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3 ימים
Location: Yokne`am
Job Type: Full Time
Our Interconnect Networking Product Engineering team is looking for an excellent hardware engineer with strong coding, analysis, and debugging skills. This role requires a deep understanding of both hardware and software to develop robust test capabilities and processes. You will drive efficient integration and provide engineering support for production testing of cutting-edge product technology. You will help ensure reliable, efficient production tests with high coverage and strong outgoing product quality.

What youll be doing:

Characterize and develop test processes of advanced interconnect products.

Play a key role in the development and bring-up of advanced hardware test solutions supporting next-generation interconnect products.

Develop embedded software capabilities packages to support various of advanced power components and Digital\ Analog ICs

Cooperate with multidisciplinary design and analysis teams for bring up, performance optimization and seamless production integration.

Lead test solution innovations to reduce test time, costs and improve overall product quality.

Develop software solutions to find, debug, and resolve problems in the production and bring-up processes.

Collaborate with overseas manufacturing and mass-production teams to improve yield, test coverage, and capacity, and to resolve production issues.

Lead advanced studies of product behavior under a wide range of system and environmental conditions.
Requirements:
What we need to see:

BSc in Computer Science, Electrical Engineering, or a related field.

3+ years of related experience in electronics development or integration.

Proven experience in Python development including access and control ICs, MCUs over I2C (Advantage).

Experience with Hardware products integration and HW lab measurement equipment.

Excellent communication skills and hands-on experience collaborating with global, cross-functional teams

Self learner, with strong motivation and a great teammate.

Ways to stand out from the crowd:

Excellent programming, HW/SW debugging and analysis skills.

Knowledge of silicon photonics, retimers, PAM4 and high-speed communication architectures.

Familiarity with hardware test development, mass-production testing, and qualification test processes.

Architectural out-of-the-box thinking, comfortable operating in a fast-changing environment, deliver short and long term solutions for challenging requirements.

Highly motivated, end-to-end problem solver with a strong ownership mindset.
This position is open to all candidates.
 
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20/05/2026
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
We're looking for a talented SoC Integration Lead to join our Nitro team and help shape what comes next. You will spearhead the SoC integration activities of sophisticated networking chips, collaborating closely with Architecture, RTL Design, Physical Design, Package Design, Verification, Software, DFT, and additional teams in a dynamic, open, and fast-paced environment. As a member of the Nitro project, you will have influence over the device through its entire lifecycle from product definition to mass production. You'll work alongside a world-class, fast-moving engineering team, take full ownership of critical IP blocks, and see your work deployed at a scale no other platform can match, powering hundreds of thousands of businesses across 190 countries.

Key job responsibilities
Take full ownership of SoC integration, including IPs development, partitioning, clock domain crossing (CDC), reset domain crossing (RDC), exploratory synthesis, and design quality verification.
Drive chip-level design implementation by partnering with multiple teams including Architecture, RTL Design, DFT, Verification, System Verification, STA, and Physical Design.
Oversee the creation of SoC-level IP blocks such as fabrics, interfaces, and security modules.
Lead RTL integration activities including micro-architecture definition, RTL coding and debug, synthesis and timing closure, and sign-off.
Address diverse functional and structural challenges, encompassing functional debugging, physical design preparation, emulation, and design quality issue resolution.
Contribute to the creation and implementation of design flows and automated solutions that facilitate efficient SoC development.
Support Verification and Emulation teams through test plan development and coverage review.
Ensure the chip meets quality and reliability standards while delivering to physical design teams, emulation platforms, firmware developers, and other stakeholders.
Requirements:
Basic Qualifications
- BSc in Computer/Electrical Engineering.
- 10+ years of hands-on experience in chip design.
- Strong practical expertise in micro-architecture and RTL design (Verilog / SystemVerilog).
- Competency in scripting languages (Python, Perl, Bash, or Tcl).
- Strong communication, collaboration, and leadership skills.
- Demonstrated ability to own and drive complex integration units end-to-end.

Preferred Qualifications
- Strong knowledge of protocols (AXI, CHI, DDR, Networking, PCIe).
- Experience with Network-on-Chip (NOC) architecture.
- Knowledge of coherent and non-coherent fabric design.
- Comprehensive SoC development cycle expertise (Synthesis, STA, CDC, Lint).
- Knowledge of Design Automation tools and techniques.
- Demonstrated commitment to quality standards and experience delivering to physical design teams, emulation platforms, firmware developers, and other stakeholders.
- Advanced degree in a related technical field.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8659806
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מה השם שלך?
תיאור
שליחה
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v נשלח
תודה על שיתוף הפעולה
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לפני 2 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an experienced Design Engineer to join the YU design team and develop the next generation technologies.

As a design engineer in the YU design team, you will participate in definition and implementation of our boot and chiplet control technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated boot components into various projects and using state-of-the-art technologies.
As a member of our YU design team, you will participate in defining various boot and chip controller features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical. Engineering/Communication Engineering.
5+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
High Level of English.

Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Knowledge in Mixed Signals, Analog, and Behavioral Models for Verification.
Knowledge in Chip boot and Infrastructures.
Experience in working with back-end on area, power and timing closures.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8703701
סגור
שירות זה פתוח ללקוחות VIP בלבד